Boost Converter Design: Part 1 — The Light-Load Challenge: Choosing Between Efficiency and Noise

Semiconductor Integrated Circuits (ICs)
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Let’s begin with a waveform. This is the output of a boost converter under a light load. The ripple is approximately 9\,\text{mV}, with sharp, high-amplitude spikes superimposed on it.

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Figure 1: Ripple and spikes at the output of a boost converter. The high-frequency glitches are mainly caused by the switching transitions (image sourced from Analog Devices).

If the load is an LED lamp, this amount of noise may not matter. If the load is an audio power amplifier, precision ADC, or RF front end, however, these spikes can degrade the noise floor or even interfere with normal operation. This series focuses on finding the right balance between battery life and a clean output.

This series follows a design example using Analog Devices boost converters LT8336 and LT8330.

What Does a Boost Converter Do?

In one sentence: It raises a low voltage to a higher voltage.

A battery-powered device may have only one lithium-ion cell, with a voltage ranging from 3.0 to 4.2\,\text{V}, while the circuit may require 5\,\text{V}, 12\,\text{V}, or even 34\,\text{V}. A boost converter does exactly this: it stores energy in an inductor and then transfers that energy to the output to raise the voltage.

Why Is Light-Load Operation So Difficult?

“Light load” means that the load current is very small, such as when a device spends most of its time in standby.

Even when the load requires only 0.1\,\text{A}, its switch, gate driver, and control circuitry continue to consume energy. If the design is not optimized, light-load efficiency can fall from more than 90% at the rated load to less than 60%, significantly shortening battery life.

Therefore, the first priority at light load is reducing wasted energy.

Why Do Efficiency and Noise Conflict?

The most direct way to improve efficiency is to reduce switching activity. Many boost ICs enter pulse-skipping mode (PSM) or Burst Mode at light load.

Burst Mode

The converter operates in DCM, and the inductor current falls to 0\,\text{A}. This mode offers the highest efficiency because energy is transferred only when it is needed. However, the effective switching frequency changes with load, and the burst-current amplitude is set internally by the IC.

Pulse-Skipping Mode

The IC maintains its programmed system clock and skips complete switching cycles when the output power is insufficient. The converter can remain in CCM in this mode; as the load becomes lighter, it can eventually enter DCM.

Burst Mode greatly reduces switching activity and allows most of the IC circuitry to sleep, improving light-load efficiency. Pulse-skipping mode also reduces switching loss compared with forced CCM, but its internal clock continues to run, so its quiescent power is higher than in Burst Mode.

The tradeoff is higher output ripple and an effective operating frequency that changes with load. This produces low-frequency “breathing” behavior, makes noise more likely to couple into downstream circuitry, and increases EMI-design difficulty.

Conversely, if the converter is forced to switch fully at a fixed frequency in continuous conduction mode (CCM/FPWM), noise is low and the spectrum is stable and easy to filter. The downside is that light-load switching loss cannot be reduced, so light-load efficiency is poor.

The classic tradeoff is:

  • CCM (forced continuous FPWM): Low noise and a regular spectrum, but poor light-load efficiency.
  • Burst / pulse-skipping (PSM-type light-load modes): High light-load efficiency, but more noise and greater frequency variation.

These options often require a tradeoff. That is the central issue in this part.

Is There a Compromise? Distinguish Modulation Mode from the DCM Current State

DCM (discontinuous conduction mode) describes a current state in which the inductor current falls to 0\,\text{A} during each cycle. It is not an independently configured operating mode.

In the light- to medium-load range, the converter may enter DCM in two different ways:

  1. With a fixed-clock pulse-skipping architecture, the system clock remains fixed and only some cycles are skipped. As the load decreases, the inductor current in each active switching cycle can fall to zero, producing fixed-clock DCM.
  2. In Burst Mode DCM, there is no fixed clock. The effective frequency varies widely with load, resulting in poor EMI behavior.

In other words, DCM alone is not the compromise. Only DCM combined with a fixed-clock control architecture can provide some balance between efficiency and noise; DCM in Burst Mode still has poor noise performance.

The real compromise is pulse-skipping mode: the converter first tries to maintain CCM, then enters fixed-clock DCM as the load becomes lighter. This preserves a stable switching frequency for noise filtering while reducing some switching loss compared with forced FPWM.

The Final Solution for Sensitive Loads: Add Another Filter Stage

Even with a carefully selected operating mode, high-frequency switching spikes may still be too large for a sensitive load. The final step is to add a second-order LC filter at the output to further attenuate switching ripple and spikes. Part 5 of this series explains how to design it.

Next, we will start with the most fundamental calculations.

Key Takeaways

  • Light-load efficiency directly affects battery life. PSM and Burst Mode improve efficiency but increase output ripple and EMI.
  • CCM produces lower, fixed-frequency ripple that is easier to filter. PSM provides higher efficiency but less predictable noise.
  • DCM combined with a fixed-clock architecture is a practical starting compromise between efficiency and noise at light load.
  • Even with the right operating mode, sensitive loads often require a second-order LC filter at the output.

Source: This article references the Analog Devices technical article Boost Converter Design for Sensitive Loads at Light Load.

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Additional References

  1. LT8336 data sheet (Analog Devices)
  2. LT8330 data sheet (Analog Devices)

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