FPGA Number Guesser in Verilog (Tutorial)

Project Synopsis

This project is based on creating a number guessing game in which a user thinks of a number between 1 and 99 in which the FPGA will guess that number in 7 attempts or less. The FPGA, in which this case is a DE-10 LITE using the Quartus software, displays a number and then the user selects if their number is higher or lower than the number displayed by moving a switch either up (for higher) or down (for lower), and then hits a button for confirmation. The FPGA then takes in account this information and guesses a new number and the cycle continues up to 7 times. Each time a new number is guessed, a corresponding LED lights up marking that an attempt has been made. If the number is guessed before the allotted 7 times, the user can hit another switch in which the FPGA ‘celebrates’ and awaits to start again via a reset button. The project was built for simplicity of understanding but can be customized for much more impressive guessing ability.

Read the full tutorial here:
Number Guessing Game in Verilog.docx (103.8 KB)