Conventional Ethernet follows the workflow: receive complete frame → CPU parsing → generate response → transmit full frame.
EtherCAT implements concurrent reception, processing and forwarding inside the LAN9252.
EtherCAT System Block Diagram
LAN9252 System Block Diagram: Dual PHY + ESC Cut-Through Forwarding Path (Image courtesy of Microchip)
Take Microchip LAN9252 as an example. Peripheral supporting components: 2 channels of isolation magnetics + RJ45 connectors, 25 MHz reference crystal oscillator.
Principles of Ultra-Low Latency
Frame “On-the-Fly Mode” Hardware Pipeline
The EtherCAT master sends one long Ethernet frame, which enters Port 0 of each slave station sequentially in serial:
The frame bit stream travels through RJ45 → isolation magnetics → on-chip PHY of LAN9252, then feeds into the ESC core.
Buffering the entire Ethernet frame is unnecessary! The ESC hardware parses the frame structure bit by bit:
-
When reading the output data segment assigned to the current slave: hardware directly captures data and writes it to the on-chip DPRAM.
-
When reaching the position reserved for input data to be uploaded to the master: hardware fetches locally sampled data from DPRAM and inserts it into the frame.
Unmodified residual bit streams are immediately forwarded to the next slave via Port1 PHY, isolation magnetics and RJ45.
In comparison, standard Ethernet controllers must receive the full frame before handing it over to the CPU for software parsing. Single-node latency starts at dozens of microseconds, accompanied by significant software overhead.
Two Parallel Data Flows in the Block Diagram Operate Without Blocking
Two fully independent signal paths exist:
- Network Path: RJ45 ↔ PHY ↔ ESC ↔ DPRAM (autonomous hardware operation, no MCU resource occupation)
- Local Path: DPRAM ↔ Local Bus ↔ Local MCU
DPRAM stands for Dual-Port RAM. Network hardware and the MCU can access it in parallel. There is no queuing bottleneck where one side occupies memory and blocks the other.
Role of EEPROM (Top-left in block diagram)
ESC configurations (FMMU, SyncManager parameters) are automatically loaded upon power-up. Protocol initialization via MCU software is not required, further lowering latency during startup.
Related Products
Microchip LAN9252
Related Products:
More Resources:
LAN9252 Datasheet
Extended Technical Topics
- Why does a simple industrial control project require Modbus, CAN, and EtherCAT?
- Why CAN alone is insufficient, and a complete CANopen architecture is mandatory for motion control?
- Fundamentals of CANopen Motion Control Safety Procedures
- How Does EtherCAT Achieve Low Latency?
- EtherCAT Low-Latency Communication: Physical Layer Reference Circuit
- Modbus RTU Working Principle: Master-Slave Architecture and Polling Mechanism
- Modbus RTU Communication Process