The present article describes how to use the LFOSC (10 kHz) internal oscillator in the Lattice ICE40 FPGA UltraPlus Breakout Board.
This On-Chip internal oscillator is ideal for low power applications or always-on applications. The following verilog HDL was used to implement the 10 kHz internal oscillator demo,
//DigiKey Coffee Cup Internal 10 KHz clock demo
module top(output IOT_39A);
//10khz used for low power applications (or sleep mode)
SB_LFOSC SB_LFOSC_inst(
.CLKLFEN(1),
.CLKLFPU(1),
.CLKLF(clk_10khz)
);
assign IOT_39A = clk_10khz;
endmodule
The module inside the Lattice ICE40 FPGA used, is the following,
Header B was used via IOT_39A to route this internal 10 KHz to the external world for measurement with the scope. After this demo was synthesized and downloaded to the flash memory, the 10KHz signal was routed to be at IOT_39A and GND as shown in this schematic diagram below,
The scope was connected between IOT_39A and GND as illustrated in the next picture,
The following scope screenshot, shows the internal 10 KHz clock being measured in Header B via IOT_39A and GND,
The iCE40 FPGA family, specifically iCE40 Ultra, iCE40 UltraLite and iCE40 UltraPlus, features this internal ultra-low power 10 kHz oscillator, for IoT low power systems, also Always-On applications and background polling that allow higher power processors to remain in power-down or sleep mode, conserving overall power consumption.
The Lattice ICE40 FPGA UltraPlus Breakout Board is an excellent system for developing low power applications and is available at DigiKey.
Have a nice day.
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