# Pad Clearance, Design Rules Dialog Box

**URL:** <https://forum.digikey.com/t/pad-clearance-design-rules-dialog-box/16018>\
**Category:** KiCad\
**Created:** [August 18, 2021, 4:03am UTC](https://forum.digikey.com/t/pad-clearance-design-rules-dialog-box/16018 "2021-08-18T04:03:00Z")\
**Posts on this page:** 2\
**Page:** 1

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**Author:** ![teranz](https://avatars.discourse-cdn.com/v4/letter/t/f05b48/32.png) [@teranz](https://forum.digikey.com/u/teranz)\
**Post date:** [August 18, 2021, 4:03am UTC](https://forum.digikey.com/t/pad-clearance-design-rules-dialog-box/16018/1 "2021-08-18T04:03:00Z")

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Hi:  
I am still a novice with Kicad and am using v5.1.2. I want to place a new part (DMN2008LFU-7, a dual N-ch MOSFET) on my PCB but the rules checker says the pad clearance (gate & source) is not enough. I have read about the “Design Rules Dialog Box” here but am unable to find it. The local clearance for the pads of the part in question are all set to 0. I do not think I am using a netlist?

It would be great if someone could point me in the right direction so I can get this clearance issue resolved.  
Thank You!  
Tom

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**Author:** ![teranz](https://avatars.discourse-cdn.com/v4/letter/t/f05b48/32.png) [@teranz](https://forum.digikey.com/u/teranz)\
**Post date:** [August 18, 2021, 3:31pm UTC](https://forum.digikey.com/t/pad-clearance-design-rules-dialog-box/16018/2 "2021-08-18T15:31:46Z")

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I was able to resolve the pad clearance problem… I loaded my project, using Pcbnew I went to File-\>Board Setup. Then to Design Rules-\>Net Classes. I only use the **default** Net Class, the **clearance** column value was 0.1524, I set this to 0.1500. The pad clearances of the DMN2008LFU-7 are 0.15, and now the pad clearance errors are gone. This change should not be a problem for board fabs.

I hope others find this info useful-  
Tom