Problems interfacing custom cape+display combo (1024x600) without EEPROM, Beaglebone Black

RobertCNelson · November 10, 2021, 9:49pm

I don’t think ts_calibrate works anymore (atleast) dynamically…

Regards,

sxramchnd · November 10, 2021, 11:42pm

Okay, I tried tweaking the display timings to different values, but at this moment it looks like there is some other issue,…

I tried commands like /dev/zero > /dev/fb0 and the output comes back as No space left on device. And cat /dev/input/event0 doesn’t print random values on my remote pc either. Is there anything else that I could try? I have worked with other displays before and writing urandom or zeros usually has worked on framebuffer devices. Weird.

sxramchnd · November 11, 2021, 3:13pm

UPDATE: I unplugged the touch IC ffc from the cape and I am able to see a console. So the display works, but the screen appears to be inverted. Is there a way to fix this? Thanks for all your help on this @RobertCNelson !

RobertCNelson · November 11, 2021, 3:19pm

Hi @sxramchnd you can add a rotation parameter to the boot args:

https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/fb/modedb.rst#n66

Dump:

ls -lha /sys/class/drm/

To get the interface name…

Regards,

sxramchnd · November 11, 2021, 3:26pm

Here is the output of ls -lha /sys/class/drm, seems like the interface is LVDS-1… Do I use a ‘video’ option in uEnv.txt?

total 0
drwxr-xr-x 2 root root 0 Nov 11 15:22 .
drwxr-xr-x 56 root root 0 Nov 11 15:00 …
lrwxrwxrwx 1 root root 0 Nov 11 15:01 card0 → …/…/devices/platform/ocp/4830e000.lcdc/drm/card0
lrwxrwxrwx 1 root root 0 Nov 11 15:01 card0-LVDS-1 → …/…/devices/platform/ocp/4830e000.lcdc/drm/card0/card0-LVDS-1
-r–r–r-- 1 root root 4.0K Nov 11 15:01 version

RobertCNelson · November 11, 2021, 3:28pm

LVDS-1

That’s the magic id you need, so edit the “video” option in /boot/uEnv.txt to include your actuall resolution and “LVDS-1” along with the rotation variable…

Regards,

sxramchnd · November 11, 2021, 4:45pm

Hi @RobertCNelson, how does the video option work with the uboot overlay for video disabled?

uname_r=4.19.212-bone-rt-r71

enable_uboot_overlays=1

disable_uboot_overlay_video=1

uboot_overlay_addr4=/lib/firmware/BB-BONE-POWERTIP-TRY1.dtbo

video=LVDS-1:1024x600@60, rotate=180

I tried setting the video option but it doesn’t work as expected. Maybe it is because I am also disabling hdmi video?

RobertCNelson · November 11, 2021, 6:02pm

no space… (60, rotate)…

video=LVDS-1:1024x600@60,rotate=180

Regards,

sxramchnd · November 19, 2021, 3:15pm

Hi @RobertCNelson, I tried this but it didn’t help. Is it possible to use an xorg.conf for /dev/fb0? instead of fbdev I’m guessing it would be DRM…

RobertCNelson · November 19, 2021, 3:18pm

Hi @sxramchnd what did it do? It’s a DRM driver, so anything would be under emulation…

You can try adding drm.debug=0x1ff to your boot args, it’ll defintelly spit out a lot more information…

Regards,

sxramchnd · November 19, 2021, 3:25pm

It did nothing. Obviously I couldn’t tell if the uEnv entry for video was recognized. Do I add the DRM debug entry in uEnv.txt?

RobertCNelson · November 19, 2021, 3:45pm

add it to the same cmdline in /boot/uEnv.txt you have the video option enabled…

Regards,

sxramchnd · November 19, 2021, 5:01pm

I tried setting bootargs=video=LVDS-1:1024x600@60,rotate=180 drm.debug=0x1ff to uEnv.txt but the changes did not seem to take place, however I see this -

[ 2.215345] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
[ 2.222003] [drm] No driver support for vblank timestamp query.
[ 2.371515] [drm] Initialized tilcdc 1.0.0 20121205 for 4830e000.lcdc on minor 0

Additionally I also tried doing setenv bootargs ($bootargs) video=LVDS-1:1024x600@60,rotate=180 drm.debug=0x1ff on u-boot console, but this is all I see. Am I doing the bootargs thing right?

RobertCNelson · November 19, 2021, 5:02pm

Hi @sxramchnd please dump your full /boot/uEnv.txt

Regards,

sxramchnd · November 19, 2021, 5:03pm

Here it is -

uname_r=4.19.212-bone-rt-r71

enable_uboot_overlays=1

disable_uboot_overlay_video=1

uboot_overlay_addr4=/lib/firmware/BB-BONE-POWERTIP-TRY2.dtbo

bootargs=video=LVDS-1:1024x600@51.2,rotate=270 drm.debug=0x1ff

enable_uboot_cape_universal=1

RobertCNelson · November 19, 2021, 5:06pm

Try changing:

bootargs=video=LVDS-1:1024x600@51.2,rotate=270 drm.debug=0x1ff

to:

cmdline=net.ifnames=0 rng_core.default_quality=100 video=LVDS-1:1024x600@51.2,rotate=270 drm.debug=0x1ff

Regards,

sxramchnd · November 19, 2021, 6:06pm

Here is the DRM log, sorry its a bit long

[ 0.000000] Kernel command line: console=ttyS0,115200n8 bone_capemgr.uboot_capemgr_enabled=1 root=/dev/mmcblk0p1 ro rootfstype=ext4 rootwait net.ifnames=0 rng_core.default_quality=100 video=LVDS-1:1024x600$[ 2.201720] [drm:drm_core_init] Initialized
[ 2.202160] [drm:tilcdc_drm_init] init
[ 2.216806] [drm:tilcdc_init.constprop.2] Maximum Bandwidth Value 78643200
[ 2.216820] [drm:tilcdc_init.constprop.2] Maximum Horizontal Pixel Width Value 2048pixels
[ 2.216831] [drm:tilcdc_init.constprop.2] Maximum Pixel Clock Value 126000KHz
[ 2.216942] [drm:tilcdc_init.constprop.2] Blue and red wiring ‘’ unknown, use legacy mode
[ 2.217596] [drm:tilcdc_init.constprop.2] loading module: panel
[ 2.217638] [drm] parse error at position 18 in video mode ‘1024x600@60,rotate=180’
[ 2.231364] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
[ 2.303516] [drm] No driver support for vblank timestamp query.
[ 2.309549] [drm:drm_irq_install] irq=58
[ 2.310155] [drm:drm_mode_object_get] OBJ ID: 31 (2)
[ 2.310184] [drm:drm_setup_crtcs]
[ 2.310212] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:31:LVDS-1]
[ 2.310235] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:31:LVDS-1] status updated from unknown to connected
[ 2.310283] [drm:tilcdc_crtc_mode_valid] Processing mode 480x800@53 with pixel clock 29200
[ 2.310396] [drm:tilcdc_crtc_mode_valid] Processing mode 1024x600@53 with pixel clock 51200
[ 2.310456] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:31:LVDS-1] probed modes :
[ 2.310480] [drm:drm_mode_debug_printmodeline] Modeline 33:“1024x600” 53 51200 1024 1184 1324 1484 600 612 632 655 0x48 0xa
[ 2.310495] [drm:drm_mode_debug_printmodeline] Modeline 32:“480x800” 53 29200 480 520 560 648 800 813 816 848 0x40 0x9
[ 2.310509] [drm:drm_setup_crtcs] connector 31 enabled? yes
[ 2.310522] [drm:drm_setup_crtcs] looking for cmdline mode on connector 31
[ 2.310532] [drm:drm_setup_crtcs] looking for preferred mode on connector 31 0
[ 2.310540] [drm:drm_setup_crtcs] found mode 1024x600
[ 2.310550] [drm:drm_setup_crtcs] picking CRTCs for 2048x2048 config
[ 2.310568] [drm:drm_setup_crtcs] desired mode 1024x600 set on crtc 29 (0,0)
[ 2.310582] [drm:drm_mode_object_get] OBJ ID: 31 (2)
[ 2.310597] [drm:drm_fb_helper_generic_probe] surface width(1024), height(600) and bpp(16)
[ 2.313845] [drm:drm_mode_addfb2] [FB:35]
[ 2.313864] [drm:drm_mode_object_put.part.0] OBJ ID: 35 (2)
[ 2.314820] [drm:drm_atomic_state_init] Allocated atomic state 91e0d3ed
[ 2.314844] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane-0] 4f541ecb state to 91e0d3ed
[ 2.314867] [drm:drm_atomic_get_crtc_state] Added [CRTC:29:tilcdc crtc] 952f2d32 state to 91e0d3ed
[ 2.314893] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1024x600] for [CRTC:29:tilcdc crtc] state 952f2d32
[ 2.314905] [drm:drm_atomic_set_crtc_for_plane] Link [PLANE:28:plane-0] state 4f541ecb to [CRTC:29:tilcdc crtc]
[ 2.314918] [drm:drm_atomic_set_fb_for_plane] Set [FB:35] for [PLANE:28:plane-0] state 4f541ecb
[ 2.314927] [drm:drm_mode_object_get] OBJ ID: 35 (1)
[ 2.314941] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:29:tilcdc crtc] to 91e0d3ed
[ 2.314960] [drm:drm_mode_object_get] OBJ ID: 31 (3)
[ 2.314971] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:31:LVDS-1] 0dddd76e state to 91e0d3ed
[ 2.314979] [drm:drm_mode_object_get] OBJ ID: 31 (4)
[ 2.314989] [drm:drm_atomic_set_crtc_for_connector] Link [CONNECTOR:31:LVDS-1] state 0dddd76e to [CRTC:29:tilcdc crtc]
[ 2.314998] [drm:drm_atomic_check_only] checking 91e0d3ed
[ 2.315018] [drm:drm_atomic_helper_check_modeset] [CRTC:29:tilcdc crtc] mode changed
[ 2.315026] [drm:drm_atomic_helper_check_modeset] [CRTC:29:tilcdc crtc] enable changed
[ 2.315034] [drm:drm_atomic_helper_check_modeset] [CRTC:29:tilcdc crtc] active changed
[ 2.315048] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:31:LVDS-1]
[ 2.315061] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:31:LVDS-1] using [ENCODER:30:LVDS-30] on [CRTC:29:tilcdc crtc]
[ 2.315071] [drm:drm_atomic_helper_check_modeset] [CRTC:29:tilcdc crtc] needs all connectors, enable: y, active: y
[ 2.315083] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:29:tilcdc crtc] to 91e0d3ed
[ 2.315095] [drm:drm_atomic_add_affected_planes] Adding all current planes for [CRTC:29:tilcdc crtc] to 91e0d3ed
[ 2.315122] [drm:tilcdc_crtc_mode_valid] Processing mode 1024x600@53 with pixel clock 51200
[ 2.315131] [drm:drm_atomic_helper_check_modeset] [CRTC:29:tilcdc crtc] mode changed
[ 2.315138] [drm:drm_atomic_helper_check_modeset] [CRTC:29:tilcdc crtc] enable changed
[ 2.315145] [drm:drm_atomic_helper_check_modeset] [CRTC:29:tilcdc crtc] active changed
[ 2.315154] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:31:LVDS-1]
[ 2.315164] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:31:LVDS-1] keeps [ENCODER:30:LVDS-30], now on [CRTC:29:tilcdc crtc]
[ 2.315172] [drm:drm_atomic_helper_check_modeset] [CRTC:29:tilcdc crtc] needs all connectors, enable: y, active: y
[ 2.315182] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:29:tilcdc crtc] to 91e0d3ed
[ 2.315193] [drm:drm_atomic_add_affected_planes] Adding all current planes for [CRTC:29:tilcdc crtc] to 91e0d3ed
[ 2.315204] [drm:drm_atomic_commit] committing 91e0d3ed
[ 2.315232] [drm:drm_calc_timestamping_constants] crtc 29: hwmode: htotal 1484, vtotal 655, vdisplay 600
[ 2.315241] [drm:drm_calc_timestamping_constants] crtc 29: clock 51200 kHz framedur 18984765 linedur 28984
[ 2.315251] [drm:drm_atomic_helper_commit_modeset_disables] modeset on [ENCODER:30:LVDS-30]
[ 2.315264] [drm:drm_atomic_helper_commit_modeset_enables] enabling [CRTC:29:tilcdc crtc]
[ 2.316451] [drm:tilcdc_crtc_enable] 1024x600, hbp=160, hfp=160, hsw=140, vbp=23, vfp=12, vsw=20
[ 2.317838] [drm:tilcdc_crtc_set_clk] lcd_clk=102400000, mode clock=51200, div=2
[ 2.317967] [drm:drm_crtc_vblank_on] crtc 0, vblank enabled 0, inmodeset 0
[ 2.317990] [drm:drm_atomic_helper_commit_modeset_enables] enabling [ENCODER:30:LVDS-30]
[ 2.318005] [drm:drm_vblank_enable] enabling vblank on crtc 0, ret: 0
[ 2.318017] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=1, diff=0, hw=0 hw_last=0
[ 2.336630] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=1, diff=1, hw=0 hw_last=0
[ 2.336692] [drm:drm_atomic_state_default_clear] Clearing atomic state 91e0d3ed
[ 2.336707] [drm:drm_mode_object_put.part.0] OBJ ID: 31 (5)
[ 2.336721] [drm:__drm_atomic_state_free] Freeing atomic state 91e0d3ed
[ 2.336864] [drm:drm_atomic_state_init] Allocated atomic state 69edcde7
[ 2.336884] [drm:drm_mode_object_get] OBJ ID: 35 (2)
[ 2.336895] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane-0] 83b784e0 state to 69edcde7
[ 2.336906] [drm:drm_mode_object_get] OBJ ID: 36 (1)
[ 2.336917] [drm:drm_atomic_get_crtc_state] Added [CRTC:29:tilcdc crtc] 73689853 state to 69edcde7
[ 2.336928] [drm:drm_mode_object_put.part.0] OBJ ID: 36 (2)
[ 2.336950] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1024x600] for [CRTC:29:tilcdc crtc] state 73689853
[ 2.336962] [drm:drm_atomic_set_fb_for_plane] Set [FB:35] for [PLANE:28:plane-0] state 83b784e0
[ 2.336969] [drm:drm_mode_object_get] OBJ ID: 35 (3)
[ 2.336976] [drm:drm_mode_object_put.part.0] OBJ ID: 35 (4)
[ 2.336988] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:29:tilcdc crtc] to 69edcde7
[ 2.337002] [drm:drm_mode_object_get] OBJ ID: 31 (5)
[ 2.337009] [drm:drm_mode_object_get] OBJ ID: 31 (6)
[ 2.337019] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:31:LVDS-1] d915e640 state to 69edcde7
[ 2.337028] [drm:drm_mode_object_put.part.0] OBJ ID: 31 (6)
[ 2.337037] [drm:drm_atomic_set_crtc_for_connector] Link [CONNECTOR:31:LVDS-1] state d915e640 to [NOCRTC]
[ 2.337045] [drm:drm_mode_object_get] OBJ ID: 31 (5)
[ 2.337055] [drm:drm_atomic_set_crtc_for_connector] Link [CONNECTOR:31:LVDS-1] state d915e640 to [CRTC:29:tilcdc crtc]
[ 2.337062] [drm:drm_atomic_check_only] checking 69edcde7
[ 2.337082] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:31:LVDS-1]
[ 2.337094] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:31:LVDS-1] keeps [ENCODER:30:LVDS-30], now on [CRTC:29:tilcdc crtc]
[ 2.337109] [drm:tilcdc_crtc_mode_valid] Processing mode 1024x600@53 with pixel clock 51200
[ 2.337122] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:31:LVDS-1]
[ 2.337131] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:31:LVDS-1] keeps [ENCODER:30:LVDS-30], now on [CRTC:29:tilcdc crtc]
[ 2.337141] [drm:drm_atomic_commit] committing 69edcde7
[ 2.337161] [drm:drm_calc_timestamping_constants] crtc 29: hwmode: htotal 1484, vtotal 655, vdisplay 600
[ 2.337171] [drm:drm_calc_timestamping_constants] crtc 29: clock 51200 kHz framedur 18984765 linedur 28984
[ 2.355612] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=2, diff=1, hw=0 hw_last=0
[ 2.355669] [drm:drm_atomic_state_default_clear] Clearing atomic state 69edcde7
[ 2.355678] [drm:drm_mode_object_put.part.0] OBJ ID: 31 (6)
[ 2.355687] [drm:drm_mode_object_put.part.0] OBJ ID: 31 (5)
[ 2.355695] [drm:drm_mode_object_put.part.0] OBJ ID: 36 (1)
[ 2.355711] [drm:drm_mode_object_put.part.0] OBJ ID: 35 (3)
[ 2.355721] [drm:__drm_atomic_state_free] Freeing atomic state 69edcde7
[ 2.359640] [drm:drm_atomic_state_init] Allocated atomic state 91e0d3ed
[ 2.359653] [drm:drm_mode_object_get] OBJ ID: 35 (2)
[ 2.359665] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane-0] c1db2cd2 state to 91e0d3ed
[ 2.359676] [drm:drm_mode_object_get] OBJ ID: 37 (1)
[ 2.359686] [drm:drm_atomic_get_crtc_state] Added [CRTC:29:tilcdc crtc] 952f2d32 state to 91e0d3ed
[ 2.359695] [drm:drm_mode_object_put.part.0] OBJ ID: 37 (2)
[ 2.359714] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1024x600] for [CRTC:29:tilcdc crtc] state 952f2d32
[ 2.359725] [drm:drm_atomic_set_fb_for_plane] Set [FB:35] for [PLANE:28:plane-0] state c1db2cd2
[ 2.359732] [drm:drm_mode_object_get] OBJ ID: 35 (3)
[ 2.359739] [drm:drm_mode_object_put.part.0] OBJ ID: 35 (4)
[ 2.359750] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:29:tilcdc crtc] to 91e0d3ed
[ 2.359763] [drm:drm_mode_object_get] OBJ ID: 31 (5)
[ 2.359769] [drm:drm_mode_object_get] OBJ ID: 31 (6)
[ 2.359780] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:31:LVDS-1] 668072e4 state to 91e0d3ed
[ 2.359788] [drm:drm_mode_object_put.part.0] OBJ ID: 31 (6)
[ 2.359798] [drm:drm_atomic_set_crtc_for_connector] Link [CONNECTOR:31:LVDS-1] state 668072e4 to [NOCRTC]
[ 2.359805] [drm:drm_mode_object_get] OBJ ID: 31 (5)
[ 2.359815] [drm:drm_atomic_set_crtc_for_connector] Link [CONNECTOR:31:LVDS-1] state 668072e4 to [CRTC:29:tilcdc crtc]
[ 2.359823] [drm:drm_atomic_check_only] checking 91e0d3ed
[ 2.359842] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:31:LVDS-1]
[ 2.359853] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:31:LVDS-1] keeps [ENCODER:30:LVDS-30], now on [CRTC:29:tilcdc crtc]
[ 2.359870] [drm:tilcdc_crtc_mode_valid] Processing mode 1024x600@53 with pixel clock 51200
[ 2.359882] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:31:LVDS-1]
[ 2.359891] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:31:LVDS-1] keeps [ENCODER:30:LVDS-30], now on [CRTC:29:tilcdc crtc]
[ 2.359900] [drm:drm_atomic_commit] committing 91e0d3ed
[ 2.359916] [drm:drm_calc_timestamping_constants] crtc 29: hwmode: htotal 1484, vtotal 655, vdisplay 600
[ 2.359925] [drm:drm_calc_timestamping_constants] crtc 29: clock 51200 kHz framedur 18984765 linedur 28984
[ 2.374605] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=3, diff=1, hw=0 hw_last=0
[ 2.374666] [drm:drm_atomic_state_default_clear] Clearing atomic state 91e0d3ed
[ 2.374675] [drm:drm_mode_object_put.part.0] OBJ ID: 31 (6)
[ 2.374684] [drm:drm_mode_object_put.part.0] OBJ ID: 31 (5)
[ 2.374692] [drm:drm_mode_object_put.part.0] OBJ ID: 37 (1)
[ 2.374706] [drm:drm_mode_object_put.part.0] OBJ ID: 35 (3)
[ 2.374715] [drm:__drm_atomic_state_free] Freeing atomic state 91e0d3ed
[ 2.391412] [drm:drm_minor_register]
[ 2.391422] [drm:drm_minor_register]
[ 2.392350] [drm:drm_minor_register] new minor registered 0
[ 2.392571] [drm:drm_sysfs_connector_add] adding “LVDS-1” to sysfs
[ 2.392583] [drm:drm_sysfs_hotplug_event] generating hotplug event
[ 2.392702] [drm] Initialized tilcdc 1.0.0 20121205 for 4830e000.lcdc on minor 0
[ 2.393603] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=4, diff=1, hw=0 hw_last=0
[ 2.412636] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=5, diff=1, hw=0 hw_last=0
[ 2.431557] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=6, diff=1, hw=0 hw_last=0
[ 2.450525] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=7, diff=1, hw=0 hw_last=0
[ 2.469502] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=8, diff=1, hw=0 hw_last=0
[ 2.488485] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=9, diff=1, hw=0 hw_last=0
[ 2.507470] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=10, diff=1, hw=0 hw_last=0
[ 2.526481] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=11, diff=1, hw=0 hw_last=0
[ 2.545434] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=12, diff=1, hw=0 hw_last=0
[ 2.564411] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=13, diff=1, hw=0 hw_last=0
[ 2.583399] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=14, diff=1, hw=0 hw_last=0
[ 2.602423] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=15, diff=1, hw=0 hw_last=0
[ 2.621370] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=16, diff=1, hw=0 hw_last=0
[ 2.640352] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=17, diff=1, hw=0 hw_last=0
[ 2.659336] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=18, diff=1, hw=0 hw_last=0
[ 2.678336] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=19, diff=1, hw=0 hw_last=0
[ 2.697322] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=20, diff=1, hw=0 hw_last=0
[ 2.716291] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=21, diff=1, hw=0 hw_last=0
[ 2.735280] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=22, diff=1, hw=0 hw_last=0
[ 2.754330] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=23, diff=1, hw=0 hw_last=0
[ 2.773330] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=24, diff=1, hw=0 hw_last=0
[ 2.792296] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=25, diff=1, hw=0 hw_last=0
[ 2.811267] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=26, diff=1, hw=0 hw_last=0
[ 2.830306] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=27, diff=1, hw=0 hw_last=0
[ 2.849270] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=28, diff=1, hw=0 hw_last=0
[ 2.868196] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=29, diff=1, hw=0 hw_last=0
[ 2.887173] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=30, diff=1, hw=0 hw_last=0
[ 2.906308] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=31, diff=1, hw=0 hw_last=0
[ 2.925229] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=32, diff=1, hw=0 hw_last=0
[ 2.944177] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=33, diff=1, hw=0 hw_last=0
[ 2.963121] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=34, diff=1, hw=0 hw_last=0
[ 2.982122] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=35, diff=1, hw=0 hw_last=0
[ 3.001111] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=36, diff=1, hw=0 hw_last=0
[ 3.020114] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=37, diff=1, hw=0 hw_last=0
[ 3.039092] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=38, diff=1, hw=0 hw_last=0
[ 3.058035] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=39, diff=1, hw=0 hw_last=0
[ 3.077003] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=40, diff=1, hw=0 hw_last=0
[ 3.096161] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=41, diff=1, hw=0 hw_last=0
[ 3.115040] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=42, diff=1, hw=0 hw_last=0
[ 3.134021] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=43, diff=1, hw=0 hw_last=0
[ 3.153032] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=44, diff=1, hw=0 hw_last=0
[ 3.172102] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=45, diff=1, hw=0 hw_last=0
[ 3.190988] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=46, diff=1, hw=0 hw_last=0
[ 3.209974] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=47, diff=1, hw=0 hw_last=0
[ 3.228956] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=48, diff=1, hw=0 hw_last=0
[ 3.248003] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=49, diff=1, hw=0 hw_last=0
[ 3.266984] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=50, diff=1, hw=0 hw_last=0
[ 3.285954] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=51, diff=1, hw=0 hw_last=0
[ 3.304914] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=52, diff=1, hw=0 hw_last=0
[ 3.323851] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=53, diff=1, hw=0 hw_last=0
[ 3.342818] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=54, diff=1, hw=0 hw_last=0
[ 3.361813] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=55, diff=1, hw=0 hw_last=0
[ 3.380799] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=56, diff=1, hw=0 hw_last=0
[ 3.392234] [drm:drm_sysfs_hotplug_event] generating hotplug event
[ 3.392327] [drm:drm_fb_helper_hotplug_event.part.11]
[ 3.392339] [drm:drm_setup_crtcs]
[ 3.392366] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:31:LVDS-1]
[ 3.392438] [drm:tilcdc_crtc_mode_valid] Processing mode 1024x600@53 with pixel clock 51200
[ 3.392568] [drm:drm_mode_debug_printmodeline] Modeline 32:“480x800” 0 29200 480 520 560 648 800 813 816 848 0x40 0x9
[ 3.392582] [drm:drm_mode_prune_invalid] Not using 480x800 mode: VIRTUAL_Y
[ 3.392604] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:31:LVDS-1] probed modes :
[ 3.392621] [drm:drm_mode_debug_printmodeline] Modeline 33:“1024x600” 53 51200 1024 1184 1324 1484 600 612 632 655 0x48 0xa
[ 3.392635] [drm:drm_setup_crtcs] connector 31 enabled? yes
[ 3.392649] [drm:drm_setup_crtcs] looking for cmdline mode on connector 31
[ 3.392659] [drm:drm_setup_crtcs] looking for preferred mode on connector 31 0
[ 3.392668] [drm:drm_setup_crtcs] found mode 1024x600
[ 3.392678] [drm:drm_setup_crtcs] picking CRTCs for 1024x600 config
[ 3.392699] [drm:drm_mode_object_put.part.0] OBJ ID: 31 (4)
[ 3.392713] [drm:drm_setup_crtcs] desired mode 1024x600 set on crtc 29 (0,0)
[ 3.392726] [drm:drm_mode_object_get] OBJ ID: 31 (3)
[ 3.392760] [drm:drm_atomic_state_init] Allocated atomic state 11bc1393
[ 3.392776] [drm:drm_mode_object_get] OBJ ID: 35 (2)
[ 3.392789] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane-0] 39630e27 state to 11bc1393
[ 3.392805] [drm:drm_mode_object_get] OBJ ID: 36 (1)
[ 3.392818] [drm:drm_atomic_get_crtc_state] Added [CRTC:29:tilcdc crtc] c7842f5a state to 11bc1393
[ 3.392831] [drm:drm_mode_object_put.part.0] OBJ ID: 36 (2)
[ 3.392854] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1024x600] for [CRTC:29:tilcdc crtc] state c7842f5a
[ 3.392868] [drm:drm_atomic_set_fb_for_plane] Set [FB:35] for [PLANE:28:plane-0] state 39630e27
[ 3.392876] [drm:drm_mode_object_get] OBJ ID: 35 (3)
[ 3.392885] [drm:drm_mode_object_put.part.0] OBJ ID: 35 (4)
[ 3.392900] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:29:tilcdc crtc] to 11bc1393
[ 3.392917] [drm:drm_mode_object_get] OBJ ID: 31 (5)
[ 3.392925] [drm:drm_mode_object_get] OBJ ID: 31 (6)
[ 3.392937] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:31:LVDS-1] b6202a4c state to 11bc1393
[ 3.392948] [drm:drm_mode_object_put.part.0] OBJ ID: 31 (6)
[ 3.392959] [drm:drm_atomic_set_crtc_for_connector] Link [CONNECTOR:31:LVDS-1] state b6202a4c to [NOCRTC]
[ 3.392969] [drm:drm_mode_object_get] OBJ ID: 31 (5)
[ 3.392981] [drm:drm_atomic_set_crtc_for_connector] Link [CONNECTOR:31:LVDS-1] state b6202a4c to [CRTC:29:tilcdc crtc]
[ 3.392992] [drm:drm_atomic_check_only] checking 11bc1393
[ 3.393020] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:31:LVDS-1]
[ 3.393035] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:31:LVDS-1] keeps [ENCODER:30:LVDS-30], now on [CRTC:29:tilcdc crtc]
[ 3.393057] [drm:tilcdc_crtc_mode_valid] Processing mode 1024x600@53 with pixel clock 51200
[ 3.393071] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:31:LVDS-1]
[ 3.393081] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:31:LVDS-1] keeps [ENCODER:30:LVDS-30], now on [CRTC:29:tilcdc crtc]
[ 3.393093] [drm:drm_atomic_commit] committing 11bc1393
[ 3.393122] [drm:drm_calc_timestamping_constants] crtc 29: hwmode: htotal 1484, vtotal 655, vdisplay 600
[ 3.393132] [drm:drm_calc_timestamping_constants] crtc 29: clock 51200 kHz framedur 18984765 linedur 28984
[ 3.399857] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=57, diff=1, hw=0 hw_last=0
[ 3.399977] [drm:drm_atomic_state_default_clear] Clearing atomic state 11bc1393
[ 3.400108] [drm:drm_mode_object_put.part.0] OBJ ID: 31 (6)
[ 3.400124] [drm:drm_mode_object_put.part.0] OBJ ID: 31 (5)
[ 3.400136] [drm:drm_mode_object_put.part.0] OBJ ID: 36 (1)
[ 3.400159] [drm:drm_mode_object_put.part.0] OBJ ID: 35 (3)
[ 3.400175] [drm:__drm_atomic_state_free] Freeing atomic state 11bc1393
[ 3.418860] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=58, diff=1, hw=0 hw_last=0
[ 3.437753] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=59, diff=1, hw=0 hw_last=0
[ 3.456740] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=60, diff=1, hw=0 hw_last=0
[ 3.475728] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=61, diff=1, hw=0 hw_last=0
[ 3.494799] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=62, diff=1, hw=0 hw_last=0
[ 3.513674] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=63, diff=1, hw=0 hw_last=0
[ 3.532698] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=64, diff=1, hw=0 hw_last=0
[ 3.551716] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=65, diff=1, hw=0 hw_last=0
[ 3.570618] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=66, diff=1, hw=0 hw_last=0
[ 3.589649] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=67, diff=1, hw=0 hw_last=0
[ 3.608638] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=68, diff=1, hw=0 hw_last=0
[ 3.627689] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=69, diff=1, hw=0 hw_last=0
[ 3.646667] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=70, diff=1, hw=0 hw_last=0
[ 3.665651] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=71, diff=1, hw=0 hw_last=0
[ 3.684597] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=72, diff=1, hw=0 hw_last=0
[ 3.703633] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=73, diff=1, hw=0 hw_last=0
[ 3.722581] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=74, diff=1, hw=0 hw_last=0
[ 3.741589] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=75, diff=1, hw=0 hw_last=0
[ 3.760536] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=76, diff=1, hw=0 hw_last=0
[ 3.779585] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=77, diff=1, hw=0 hw_last=0
[ 3.798559] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=78, diff=1, hw=0 hw_last=0
[ 3.817513] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=79, diff=1, hw=0 hw_last=0
[ 3.836471] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=80, diff=1, hw=0 hw_last=0
[ 3.855513] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=81, diff=1, hw=0 hw_last=0
[ 3.874492] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=82, diff=1, hw=0 hw_last=0
[ 3.893455] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=83, diff=1, hw=0 hw_last=0
[ 3.912403] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=84, diff=1, hw=0 hw_last=0
[ 3.931425] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=85, diff=1, hw=0 hw_last=0
[ 3.950403] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=86, diff=1, hw=0 hw_last=0
[ 3.969373] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=87, diff=1, hw=0 hw_last=0
[ 3.988339] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=88, diff=1, hw=0 hw_last=0
[ 4.007356] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=89, diff=1, hw=0 hw_last=0
[ 4.026340] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=90, diff=1, hw=0 hw_last=0
[ 4.045320] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=91, diff=1, hw=0 hw_last=0
[ 4.064284] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=92, diff=1, hw=0 hw_last=0
[ 4.083310] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=93, diff=1, hw=0 hw_last=0
[ 4.102285] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=94, diff=1, hw=0 hw_last=0
[ 4.121254] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=95, diff=1, hw=0 hw_last=0
[ 4.140229] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=96, diff=1, hw=0 hw_last=0
[ 4.159255] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=97, diff=1, hw=0 hw_last=0
[ 4.178222] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=98, diff=1, hw=0 hw_last=0
[ 4.197204] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=99, diff=1, hw=0 hw_last=0
[ 4.216238] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=100, diff=1, hw=0 hw_last=0
[ 4.235178] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=101, diff=1, hw=0 hw_last=0
[ 4.254174] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=102, diff=1, hw=0 hw_last=0
[ 4.273136] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=103, diff=1, hw=0 hw_last=0
[ 4.292187] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=104, diff=1, hw=0 hw_last=0
[ 4.311125] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=105, diff=1, hw=0 hw_last=0
[ 4.330110] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=106, diff=1, hw=0 hw_last=0
[ 4.349092] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=107, diff=1, hw=0 hw_last=0
[ 4.368168] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=108, diff=1, hw=0 hw_last=0
[ 4.387062] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=109, diff=1, hw=0 hw_last=0
[ 4.406057] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=110, diff=1, hw=0 hw_last=0
[ 4.425009] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=111, diff=1, hw=0 hw_last=0
[ 4.444097] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=112, diff=1, hw=0 hw_last=0
[ 4.463000] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=113, diff=1, hw=0 hw_last=0
[ 4.481975] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=114, diff=1, hw=0 hw_last=0
[ 4.500962] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=115, diff=1, hw=0 hw_last=0
[ 4.519953] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=116, diff=1, hw=0 hw_last=0
[ 4.538934] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=117, diff=1, hw=0 hw_last=0
[ 4.557920] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=118, diff=1, hw=0 hw_last=0
[ 4.576888] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=119, diff=1, hw=0 hw_last=0
[ 4.595896] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=120, diff=1, hw=0 hw_last=0
[ 4.614871] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=121, diff=1, hw=0 hw_last=0
[ 4.633857] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=122, diff=1, hw=0 hw_last=0
[ 4.652817] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=123, diff=1, hw=0 hw_last=0
[ 4.671836] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=124, diff=1, hw=0 hw_last=0
[ 4.690816] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=125, diff=1, hw=0 hw_last=0
[ 4.709806] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=126, diff=1, hw=0 hw_last=0
[ 4.728762] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=127, diff=1, hw=0 hw_last=0
[ 4.747761] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=128, diff=1, hw=0 hw_last=0
[ 4.766759] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=129, diff=1, hw=0 hw_last=0
[ 4.785726] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=130, diff=1, hw=0 hw_last=0
[ 4.804714] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=131, diff=1, hw=0 hw_last=0
[ 4.823703] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=132, diff=1, hw=0 hw_last=0
[ 4.842692] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=133, diff=1, hw=0 hw_last=0
[ 4.861675] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=134, diff=1, hw=0 hw_last=0
[ 4.880657] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=135, diff=1, hw=0 hw_last=0
[ 4.899646] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=136, diff=1, hw=0 hw_last=0
[ 4.918609] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=137, diff=1, hw=0 hw_last=0
[ 4.937602] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=138, diff=1, hw=0 hw_last=0
[ 4.956580] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=139, diff=1, hw=0 hw_last=0
[ 4.975581] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=140, diff=1, hw=0 hw_last=0
[ 4.994577] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=141, diff=1, hw=0 hw_last=0
[ 5.013543] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=142, diff=1, hw=0 hw_last=0
[ 5.032511] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=143, diff=1, hw=0 hw_last=0
[ 5.051534] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=144, diff=1, hw=0 hw_last=0
[ 5.070510] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=145, diff=1, hw=0 hw_last=0
[ 5.089495] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=146, diff=1, hw=0 hw_last=0
[ 5.108446] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=147, diff=1, hw=0 hw_last=0
[ 5.127470] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=148, diff=1, hw=0 hw_last=0
[ 5.146450] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=149, diff=1, hw=0 hw_last=0
[ 5.165432] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=150, diff=1, hw=0 hw_last=0
[ 5.184396] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=151, diff=1, hw=0 hw_last=0
[ 5.203399] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=152, diff=1, hw=0 hw_last=0
[ 5.222401] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=153, diff=1, hw=0 hw_last=0
[ 5.241369] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=154, diff=1, hw=0 hw_last=0
[ 5.260335] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=155, diff=1, hw=0 hw_last=0
[ 5.279336] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=156, diff=1, hw=0 hw_last=0
[ 5.298330] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=157, diff=1, hw=0 hw_last=0
[ 5.317298] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=158, diff=1, hw=0 hw_last=0
[ 5.336269] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=159, diff=1, hw=0 hw_last=0
[ 5.355291] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=160, diff=1, hw=0 hw_last=0
[ 5.374273] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=161, diff=1, hw=0 hw_last=0
[ 5.393248] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=162, diff=1, hw=0 hw_last=0
[ 5.412207] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=163, diff=1, hw=0 hw_last=0
[ 5.431226] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=164, diff=1, hw=0 hw_last=0
[ 5.450192] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=165, diff=1, hw=0 hw_last=0
[ 5.469185] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=166, diff=1, hw=0 hw_last=0
[ 5.488153] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=167, diff=1, hw=0 hw_last=0
[ 5.507159] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=168, diff=1, hw=0 hw_last=0
[ 5.526157] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=169, diff=1, hw=0 hw_last=0
[ 5.545125] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=170, diff=1, hw=0 hw_last=0
[ 5.564181] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=171, diff=1, hw=0 hw_last=0
[ 5.583097] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=172, diff=1, hw=0 hw_last=0
[ 5.602081] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=173, diff=1, hw=0 hw_last=0
[ 5.621059] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=174, diff=1, hw=0 hw_last=0
[ 5.640118] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=175, diff=1, hw=0 hw_last=0
[ 5.659040] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=176, diff=1, hw=0 hw_last=0
[ 5.678031] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=177, diff=1, hw=0 hw_last=0
[ 5.697007] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=178, diff=1, hw=0 hw_last=0
[ 5.716118] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=179, diff=1, hw=0 hw_last=0
[ 5.734991] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=180, diff=1, hw=0 hw_last=0
[ 5.753975] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=181, diff=1, hw=0 hw_last=0
[ 5.772954] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=182, diff=1, hw=0 hw_last=0
[ 5.791928] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=183, diff=1, hw=0 hw_last=0
[ 5.810932] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=184, diff=1, hw=0 hw_last=0
[ 5.829886] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=185, diff=1, hw=0 hw_last=0
[ 5.848873] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=186, diff=1, hw=0 hw_last=0
[ 5.867878] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=187, diff=1, hw=0 hw_last=0
[ 5.886839] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=188, diff=1, hw=0 hw_last=0
[ 5.905838] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=189, diff=1, hw=0 hw_last=0
[ 5.924819] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=190, diff=1, hw=0 hw_last=0
[ 5.943840] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=191, diff=1, hw=0 hw_last=0
[ 5.962813] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=192, diff=1, hw=0 hw_last=0
[ 5.981779] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=193, diff=1, hw=0 hw_last=0
[ 6.000736] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=194, diff=1, hw=0 hw_last=0
[ 6.019801] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=195, diff=1, hw=0 hw_last=0
[ 6.038730] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=196, diff=1, hw=0 hw_last=0
[ 6.057735] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=197, diff=1, hw=0 hw_last=0
[ 6.076682] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=198, diff=1, hw=0 hw_last=0
[ 6.095716] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=199, diff=1, hw=0 hw_last=0
[ 6.114661] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=200, diff=1, hw=0 hw_last=0
[ 6.133650] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=201, diff=1, hw=0 hw_last=0
[ 6.152627] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=202, diff=1, hw=0 hw_last=0
[ 6.171628] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=203, diff=1, hw=0 hw_last=0
[ 6.190627] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=204, diff=1, hw=0 hw_last=0
[ 6.209565] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=205, diff=1, hw=0 hw_last=0
[ 6.228554] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=206, diff=1, hw=0 hw_last=0
[ 6.247566] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=207, diff=1, hw=0 hw_last=0
[ 6.266568] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=208, diff=1, hw=0 hw_last=0
[ 6.285547] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=209, diff=1, hw=0 hw_last=0
[ 6.304494] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=210, diff=1, hw=0 hw_last=0
[ 6.323541] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=211, diff=1, hw=0 hw_last=0
[ 6.342526] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=212, diff=1, hw=0 hw_last=0
[ 6.361485] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=213, diff=1, hw=0 hw_last=0
[ 6.380442] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=214, diff=1, hw=0 hw_last=0
[ 6.399423] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=215, diff=1, hw=0 hw_last=0
[ 6.418435] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=216, diff=1, hw=0 hw_last=0
[ 6.437420] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=217, diff=1, hw=0 hw_last=0
[ 6.456381] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=218, diff=1, hw=0 hw_last=0
[ 6.475411] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=219, diff=1, hw=0 hw_last=0
[ 6.494341] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=220, diff=1, hw=0 hw_last=0
[ 6.513338] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=221, diff=1, hw=0 hw_last=0
[ 6.532306] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=222, diff=1, hw=0 hw_last=0
[ 6.551313] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=223, diff=1, hw=0 hw_last=0
[ 6.570309] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=224, diff=1, hw=0 hw_last=0
[ 6.589271] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=225, diff=1, hw=0 hw_last=0
[ 6.608262] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=226, diff=1, hw=0 hw_last=0
[ 6.627258] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=227, diff=1, hw=0 hw_last=0
[ 6.646247] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=228, diff=1, hw=0 hw_last=0
[ 6.665240] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=229, diff=1, hw=0 hw_last=0
[ 6.684237] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=230, diff=1, hw=0 hw_last=0
[ 6.703197] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=231, diff=1, hw=0 hw_last=0
[ 6.722180] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=232, diff=1, hw=0 hw_last=0
[ 6.741152] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=233, diff=1, hw=0 hw_last=0
[ 6.760172] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=234, diff=1, hw=0 hw_last=0
[ 6.779145] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=235, diff=1, hw=0 hw_last=0
[ 6.798121] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=236, diff=1, hw=0 hw_last=0
[ 6.817086] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=237, diff=1, hw=0 hw_last=0
[ 6.836096] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=238, diff=1, hw=0 hw_last=0
[ 6.855071] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=239, diff=1, hw=0 hw_last=0
[ 6.874059] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=240, diff=1, hw=0 hw_last=0
[ 6.893032] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=241, diff=1, hw=0 hw_last=0
[ 6.912140] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=242, diff=1, hw=0 hw_last=0
[ 6.931051] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=243, diff=1, hw=0 hw_last=0
[ 6.949988] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=244, diff=1, hw=0 hw_last=0
[ 6.968972] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=245, diff=1, hw=0 hw_last=0
[ 6.987965] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=246, diff=1, hw=0 hw_last=0
[ 7.006986] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=247, diff=1, hw=0 hw_last=0
[ 7.025943] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=248, diff=1, hw=0 hw_last=0
[ 7.044904] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=249, diff=1, hw=0 hw_last=0
[ 7.063911] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=250, diff=1, hw=0 hw_last=0
[ 7.082884] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=251, diff=1, hw=0 hw_last=0
[ 7.101861] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=252, diff=1, hw=0 hw_last=0
[ 7.120843] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=253, diff=1, hw=0 hw_last=0
[ 7.139872] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=254, diff=1, hw=0 hw_last=0
[ 7.158849] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=255, diff=1, hw=0 hw_last=0
[ 7.177800] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=256, diff=1, hw=0 hw_last=0
[ 7.196787] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=257, diff=1, hw=0 hw_last=0
[ 7.215836] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=258, diff=1, hw=0 hw_last=0
[ 7.234790] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=259, diff=1, hw=0 hw_last=0
[ 7.253740] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=260, diff=1, hw=0 hw_last=0
[ 7.272719] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=261, diff=1, hw=0 hw_last=0
[ 7.291752] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=262, diff=1, hw=0 hw_last=0
[ 7.310699] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=263, diff=1, hw=0 hw_last=0
[ 7.329698] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=264, diff=1, hw=0 hw_last=0
[ 7.348650] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=265, diff=1, hw=0 hw_last=0
[ 7.367701] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=266, diff=1, hw=0 hw_last=0
[ 7.386634] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=267, diff=1, hw=0 hw_last=0
[ 7.405605] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=268, diff=1, hw=0 hw_last=0
[ 7.424597] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=269, diff=1, hw=0 hw_last=0
[ 7.443593] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=270, diff=1, hw=0 hw_last=0
[ 7.462588] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=271, diff=1, hw=0 hw_last=0
[ 7.481570] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=272, diff=1, hw=0 hw_last=0
[ 7.500538] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=273, diff=1, hw=0 hw_last=0
[ 7.519529] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=274, diff=1, hw=0 hw_last=0
[ 7.538509] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=275, diff=1, hw=0 hw_last=0
[ 7.557485] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=276, diff=1, hw=0 hw_last=0
[ 7.576470] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=277, diff=1, hw=0 hw_last=0
[ 7.595456] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=278, diff=1, hw=0 hw_last=0
[ 7.614450] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=279, diff=1, hw=0 hw_last=0
[ 7.633413] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=280, diff=1, hw=0 hw_last=0
[ 7.652403] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=281, diff=1, hw=0 hw_last=0
[ 7.671401] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=282, diff=1, hw=0 hw_last=0
[ 7.690387] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=283, diff=1, hw=0 hw_last=0
[ 7.709374] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=284, diff=1, hw=0 hw_last=0
[ 7.728338] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=285, diff=1, hw=0 hw_last=0
[ 7.747328] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=286, diff=1, hw=0 hw_last=0
[ 7.766340] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=287, diff=1, hw=0 hw_last=0
[ 7.785316] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=288, diff=1, hw=0 hw_last=0
[ 7.804286] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=289, diff=1, hw=0 hw_last=0
[ 7.823294] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=290, diff=1, hw=0 hw_last=0
[ 7.842267] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=291, diff=1, hw=0 hw_last=0
[ 7.861251] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=292, diff=1, hw=0 hw_last=0
[ 7.880230] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=293, diff=1, hw=0 hw_last=0
[ 7.899269] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=294, diff=1, hw=0 hw_last=0
[ 7.918209] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=295, diff=1, hw=0 hw_last=0
[ 7.937188] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=296, diff=1, hw=0 hw_last=0
[ 7.956204] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=297, diff=1, hw=0 hw_last=0
[ 7.975213] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=298, diff=1, hw=0 hw_last=0
[ 7.994146] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=299, diff=1, hw=0 hw_last=0
[ 8.013139] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=300, diff=1, hw=0 hw_last=0
[ 8.032158] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=301, diff=1, hw=0 hw_last=0
[ 8.051142] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=302, diff=1, hw=0 hw_last=0
[ 8.070076] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=303, diff=1, hw=0 hw_last=0
[ 8.089067] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=304, diff=1, hw=0 hw_last=0
[ 8.108129] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=305, diff=1, hw=0 hw_last=0
[ 8.127029] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=306, diff=1, hw=0 hw_last=0
[ 8.146070] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=307, diff=1, hw=0 hw_last=0
[ 8.164999] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=308, diff=1, hw=0 hw_last=0
[ 8.184154] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=309, diff=1, hw=0 hw_last=0
[ 8.202978] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=310, diff=1, hw=0 hw_last=0
[ 8.222008] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=311, diff=1, hw=0 hw_last=0
[ 8.240938] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=312, diff=1, hw=0 hw_last=0
[ 8.259948] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=313, diff=1, hw=0 hw_last=0
[ 8.278924] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=314, diff=1, hw=0 hw_last=0
[ 8.297904] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=315, diff=1, hw=0 hw_last=0
[ 8.316893] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=316, diff=1, hw=0 hw_last=0
[ 8.335856] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=317, diff=1, hw=0 hw_last=0
[ 8.354867] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=318, diff=1, hw=0 hw_last=0
[ 8.373852] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=319, diff=1, hw=0 hw_last=0
[ 8.392828] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=320, diff=1, hw=0 hw_last=0
[ 8.411816] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=321, diff=1, hw=0 hw_last=0
[ 8.416138] [drm:vblank_disable_fn] disabling vblank on crtc 0
[ 8.416166] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=322, diff=0, hw=0 hw_last=0
[ 106.981727] [drm:drm_atomic_state_init] Allocated atomic state e820759e
[ 106.981755] [drm:drm_mode_object_get] OBJ ID: 35 (2)
[ 106.981768] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane-0] a12a921c state to e820759e
[ 106.981791] [drm:drm_mode_object_get] OBJ ID: 34 (1)
[ 106.981805] [drm:drm_atomic_get_crtc_state] Added [CRTC:29:tilcdc crtc] a176b26a state to e820759e
[ 106.981817] [drm:drm_mode_object_put.part.0] OBJ ID: 34 (2)
[ 106.981845] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1024x600] for [CRTC:29:tilcdc crtc] state a176b26a
[ 106.981860] [drm:drm_atomic_set_fb_for_plane] Set [FB:35] for [PLANE:28:plane-0] state a12a921c
[ 106.981867] [drm:drm_mode_object_get] OBJ ID: 35 (3)
[ 106.981874] [drm:drm_mode_object_put.part.0] OBJ ID: 35 (4)
[ 106.981888] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:29:tilcdc crtc] to e820759e
[ 106.981907] [drm:drm_mode_object_get] OBJ ID: 31 (5)
[ 106.981914] [drm:drm_mode_object_get] OBJ ID: 31 (6)
[ 106.981924] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:31:LVDS-1] 35c9620f state to e820759e
[ 106.981934] [drm:drm_mode_object_put.part.0] OBJ ID: 31 (6)
[ 106.981944] [drm:drm_atomic_set_crtc_for_connector] Link [CONNECTOR:31:LVDS-1] state 35c9620f to [NOCRTC]
[ 106.981952] [drm:drm_mode_object_get] OBJ ID: 31 (5)
[ 106.981962] [drm:drm_atomic_set_crtc_for_connector] Link [CONNECTOR:31:LVDS-1] state 35c9620f to [CRTC:29:tilcdc crtc]
[ 106.981972] [drm:drm_atomic_check_only] checking e820759e
[ 106.982003] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:31:LVDS-1]
[ 106.982017] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:31:LVDS-1] keeps [ENCODER:30:LVDS-30], now on [CRTC:29:tilcdc crtc]
[ 106.982043] [drm:tilcdc_crtc_mode_valid] Processing mode 1024x600@53 with pixel clock 51200
[ 106.982056] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:31:LVDS-1]
[ 106.982066] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:31:LVDS-1] keeps [ENCODER:30:LVDS-30], now on [CRTC:29:tilcdc crtc]
[ 106.982078] [drm:drm_atomic_commit] committing e820759e
[ 106.982106] [drm:drm_calc_timestamping_constants] crtc 29: hwmode: htotal 1484, vtotal 655, vdisplay 600
[ 106.982116] [drm:drm_calc_timestamping_constants] crtc 29: clock 51200 kHz framedur 18984765 linedur 28984
[ 106.982144] [drm:drm_vblank_enable] enabling vblank on crtc 0, ret: 0
[ 106.982160] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=322, diff=0, hw=0 hw_last=0
[ 106.999758] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=322, diff=1, hw=0 hw_last=0
[ 106.999943] [drm:drm_atomic_state_default_clear] Clearing atomic state e820759e
[ 106.999958] [drm:drm_mode_object_put.part.0] OBJ ID: 31 (6)
[ 107.000942] [drm:drm_mode_object_put.part.0] OBJ ID: 31 (5)
[ 107.000959] [drm:drm_mode_object_put.part.0] OBJ ID: 34 (1)
[ 107.000981] [drm:drm_mode_object_put.part.0] OBJ ID: 35 (3)
[ 107.001003] [drm:__drm_atomic_state_free] Freeing atomic state e820759e
[ 107.018720] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=323, diff=1, hw=0 hw_last=0
[ 107.037685] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=324, diff=1, hw=0 hw_last=0
[ 107.056661] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=325, diff=1, hw=0 hw_last=0
[ 107.075657] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=326, diff=1, hw=0 hw_last=0
[ 107.094626] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=327, diff=1, hw=0 hw_last=0
[ 107.113578] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=328, diff=1, hw=0 hw_last=0
[ 107.132559] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=329, diff=1, hw=0 hw_last=0
[ 107.151551] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=330, diff=1, hw=0 hw_last=0
[ 107.170532] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=331, diff=1, hw=0 hw_last=0
[ 107.189517] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=332, diff=1, hw=0 hw_last=0
[ 107.208498] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=333, diff=1, hw=0 hw_last=0
[ 107.227492] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=334, diff=1, hw=0 hw_last=0
[ 107.246470] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=335, diff=1, hw=0 hw_last=0
[ 107.265458] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=336, diff=1, hw=0 hw_last=0
[ 107.284440] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=337, diff=1, hw=0 hw_last=0
[ 107.303419] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=338, diff=1, hw=0 hw_last=0
[ 107.322410] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=339, diff=1, hw=0 hw_last=0
[ 107.341391] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=340, diff=1, hw=0 hw_last=0
[ 107.360374] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=341, diff=1, hw=0 hw_last=0
[ 107.379357] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=342, diff=1, hw=0 hw_last=0
[ 107.398352] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=343, diff=1, hw=0 hw_last=0
[ 107.417335] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=344, diff=1, hw=0 hw_last=0
[ 107.436321] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=345, diff=1, hw=0 hw_last=0
[ 107.455294] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=346, diff=1, hw=0 hw_last=0
[ 107.474285] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=347, diff=1, hw=0 hw_last=0
[ 107.493271] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=348, diff=1, hw=0 hw_last=0
[ 107.512255] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=349, diff=1, hw=0 hw_last=0
[ 107.531243] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=350, diff=1, hw=0 hw_last=0
[ 107.550257] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=351, diff=1, hw=0 hw_last=0
[ 107.569220] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=352, diff=1, hw=0 hw_last=0
[ 107.588199] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=353, diff=1, hw=0 hw_last=0
[ 107.607175] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=354, diff=1, hw=0 hw_last=0
[ 107.626184] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=355, diff=1, hw=0 hw_last=0
[ 107.645157] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=356, diff=1, hw=0 hw_last=0
[ 107.664138] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=357, diff=1, hw=0 hw_last=0
[ 107.683108] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=358, diff=1, hw=0 hw_last=0
[ 107.702102] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=359, diff=1, hw=0 hw_last=0
[ 107.721075] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=360, diff=1, hw=0 hw_last=0
[ 107.740085] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=361, diff=1, hw=0 hw_last=0
[ 107.759058] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=362, diff=1, hw=0 hw_last=0
[ 107.778044] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=363, diff=1, hw=0 hw_last=0
[ 107.797031] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=364, diff=1, hw=0 hw_last=0
[ 107.816038] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=365, diff=1, hw=0 hw_last=0
[ 107.835004] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=366, diff=1, hw=0 hw_last=0
[ 107.853985] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=367, diff=1, hw=0 hw_last=0
[ 107.872969] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=368, diff=1, hw=0 hw_last=0
[ 107.891944] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=369, diff=1, hw=0 hw_last=0
[ 107.910930] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=370, diff=1, hw=0 hw_last=0
[ 107.929916] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=371, diff=1, hw=0 hw_last=0
[ 107.948909] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=372, diff=1, hw=0 hw_last=0
[ 107.967876] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=373, diff=1, hw=0 hw_last=0
[ 107.986881] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=374, diff=1, hw=0 hw_last=0
[ 108.005864] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=375, diff=1, hw=0 hw_last=0
[ 108.024843] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=376, diff=1, hw=0 hw_last=0
[ 108.043819] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=377, diff=1, hw=0 hw_last=0
[ 108.062808] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=378, diff=1, hw=0 hw_last=0
[ 108.081793] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=379, diff=1, hw=0 hw_last=0
[ 108.100779] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=380, diff=1, hw=0 hw_last=0
[ 108.119783] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=381, diff=1, hw=0 hw_last=0
[ 108.138763] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=382, diff=1, hw=0 hw_last=0
[ 108.157742] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=383, diff=1, hw=0 hw_last=0
[ 108.176728] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=384, diff=1, hw=0 hw_last=0
[ 108.195711] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=385, diff=1, hw=0 hw_last=0
[ 108.214694] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=386, diff=1, hw=0 hw_last=0
[ 108.233676] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=387, diff=1, hw=0 hw_last=0
[ 108.252655] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=388, diff=1, hw=0 hw_last=0
[ 108.271652] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=389, diff=1, hw=0 hw_last=0
[ 108.290635] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=390, diff=1, hw=0 hw_last=0
[ 108.309619] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=391, diff=1, hw=0 hw_last=0
[ 108.328600] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=392, diff=1, hw=0 hw_last=0
[ 108.347577] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=393, diff=1, hw=0 hw_last=0
[ 108.366569] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=394, diff=1, hw=0 hw_last=0
[ 108.385556] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=395, diff=1, hw=0 hw_last=0
[ 108.404543] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=396, diff=1, hw=0 hw_last=0
[ 108.423525] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=397, diff=1, hw=0 hw_last=0
[ 108.442507] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=398, diff=1, hw=0 hw_last=0
[ 108.461491] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=399, diff=1, hw=0 hw_last=0
[ 108.480483] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=400, diff=1, hw=0 hw_last=0
[ 108.499462] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=401, diff=1, hw=0 hw_last=0
[ 108.518448] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=402, diff=1, hw=0 hw_last=0
[ 108.537430] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=403, diff=1, hw=0 hw_last=0
[ 108.556418] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=404, diff=1, hw=0 hw_last=0
[ 108.575390] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=405, diff=1, hw=0 hw_last=0
[ 108.594389] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=406, diff=1, hw=0 hw_last=0
[ 108.613370] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=407, diff=1, hw=0 hw_last=0
[ 108.632355] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=408, diff=1, hw=0 hw_last=0
[ 108.651325] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=409, diff=1, hw=0 hw_last=0
[ 108.670330] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=410, diff=1, hw=0 hw_last=0
[ 108.689315] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=411, diff=1, hw=0 hw_last=0
[ 108.708295] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=412, diff=1, hw=0 hw_last=0
[ 108.727273] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=413, diff=1, hw=0 hw_last=0
[ 108.746267] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=414, diff=1, hw=0 hw_last=0
[ 108.765251] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=415, diff=1, hw=0 hw_last=0
[ 108.784233] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=416, diff=1, hw=0 hw_last=0
[ 108.803215] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=417, diff=1, hw=0 hw_last=0
[ 108.822207] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=418, diff=1, hw=0 hw_last=0
[ 108.841188] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=419, diff=1, hw=0 hw_last=0
[ 108.860178] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=420, diff=1, hw=0 hw_last=0
[ 108.879154] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=421, diff=1, hw=0 hw_last=0
[ 108.898140] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=422, diff=1, hw=0 hw_last=0
[ 108.917124] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=423, diff=1, hw=0 hw_last=0
[ 108.936108] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=424, diff=1, hw=0 hw_last=0
[ 108.955087] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=425, diff=1, hw=0 hw_last=0
[ 108.974086] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=426, diff=1, hw=0 hw_last=0
[ 108.993071] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=427, diff=1, hw=0 hw_last=0
[ 109.012050] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=428, diff=1, hw=0 hw_last=0
[ 109.031032] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=429, diff=1, hw=0 hw_last=0
[ 109.050026] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=430, diff=1, hw=0 hw_last=0
[ 109.069007] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=431, diff=1, hw=0 hw_last=0
[ 109.087984] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=432, diff=1, hw=0 hw_last=0
[ 109.106974] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=433, diff=1, hw=0 hw_last=0
[ 109.125959] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=434, diff=1, hw=0 hw_last=0
[ 109.144944] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=435, diff=1, hw=0 hw_last=0
[ 109.163922] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=436, diff=1, hw=0 hw_last=0
[ 109.182910] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=437, diff=1, hw=0 hw_last=0
[ 109.201899] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=438, diff=1, hw=0 hw_last=0
[ 109.220888] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=439, diff=1, hw=0 hw_last=0
[ 109.239863] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=440, diff=1, hw=0 hw_last=0
[ 109.258859] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=441, diff=1, hw=0 hw_last=0
[ 109.277834] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=442, diff=1, hw=0 hw_last=0
[ 109.296825] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=443, diff=1, hw=0 hw_last=0
[ 109.315799] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=444, diff=1, hw=0 hw_last=0
[ 109.334792] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=445, diff=1, hw=0 hw_last=0
[ 109.353772] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=446, diff=1, hw=0 hw_last=0
[ 109.372759] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=447, diff=1, hw=0 hw_last=0
[ 109.391740] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=448, diff=1, hw=0 hw_last=0
[ 109.410724] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=449, diff=1, hw=0 hw_last=0
[ 109.429723] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=450, diff=1, hw=0 hw_last=0
[ 109.448702] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=451, diff=1, hw=0 hw_last=0
[ 109.467763] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=452, diff=1, hw=0 hw_last=0
[ 109.486680] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=453, diff=1, hw=0 hw_last=0
[ 109.505669] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=454, diff=1, hw=0 hw_last=0
[ 109.524640] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=455, diff=1, hw=0 hw_last=0
[ 109.543624] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=456, diff=1, hw=0 hw_last=0
[ 109.562616] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=457, diff=1, hw=0 hw_last=0
[ 109.581601] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=458, diff=1, hw=0 hw_last=0
[ 109.600580] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=459, diff=1, hw=0 hw_last=0
[ 109.619568] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=460, diff=1, hw=0 hw_last=0
[ 109.638550] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=461, diff=1, hw=0 hw_last=0
[ 109.657544] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=462, diff=1, hw=0 hw_last=0
[ 109.676524] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=463, diff=1, hw=0 hw_last=0
[ 109.695500] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=464, diff=1, hw=0 hw_last=0
[ 109.714487] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=465, diff=1, hw=0 hw_last=0
[ 109.733466] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=466, diff=1, hw=0 hw_last=0
[ 109.752457] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=467, diff=1, hw=0 hw_last=0
[ 109.771445] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=468, diff=1, hw=0 hw_last=0
[ 109.790431] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=469, diff=1, hw=0 hw_last=0
[ 109.809411] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=470, diff=1, hw=0 hw_last=0
[ 109.828406] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=471, diff=1, hw=0 hw_last=0
[ 109.847376] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=472, diff=1, hw=0 hw_last=0
[ 109.866366] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=473, diff=1, hw=0 hw_last=0
[ 109.885352] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=474, diff=1, hw=0 hw_last=0
[ 109.904334] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=475, diff=1, hw=0 hw_last=0
[ 109.923314] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=476, diff=1, hw=0 hw_last=0
[ 109.942306] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=477, diff=1, hw=0 hw_last=0
[ 109.961291] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=478, diff=1, hw=0 hw_last=0
[ 109.980273] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=479, diff=1, hw=0 hw_last=0
[ 109.999253] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=480, diff=1, hw=0 hw_last=0
[ 110.018255] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=481, diff=1, hw=0 hw_last=0
[ 110.037240] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=482, diff=1, hw=0 hw_last=0
[ 110.056224] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=483, diff=1, hw=0 hw_last=0
[ 110.075194] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=484, diff=1, hw=0 hw_last=0
[ 110.094182] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=485, diff=1, hw=0 hw_last=0
[ 110.113174] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=486, diff=1, hw=0 hw_last=0
[ 110.132157] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=487, diff=1, hw=0 hw_last=0
[ 110.151147] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=488, diff=1, hw=0 hw_last=0
[ 110.170129] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=489, diff=1, hw=0 hw_last=0
[ 110.189107] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=490, diff=1, hw=0 hw_last=0
[ 110.208087] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=491, diff=1, hw=0 hw_last=0
[ 110.227057] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=492, diff=1, hw=0 hw_last=0
[ 110.246068] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=493, diff=1, hw=0 hw_last=0
[ 110.265047] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=494, diff=1, hw=0 hw_last=0
[ 110.284051] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=495, diff=1, hw=0 hw_last=0
[ 110.303012] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=496, diff=1, hw=0 hw_last=0
[ 110.322017] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=497, diff=1, hw=0 hw_last=0
[ 110.340993] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=498, diff=1, hw=0 hw_last=0
[ 110.359968] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=499, diff=1, hw=0 hw_last=0
[ 110.378951] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=500, diff=1, hw=0 hw_last=0
[ 110.397941] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=501, diff=1, hw=0 hw_last=0
[ 110.416929] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=502, diff=1, hw=0 hw_last=0
[ 110.435912] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=503, diff=1, hw=0 hw_last=0
[ 110.454895] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=504, diff=1, hw=0 hw_last=0
[ 110.473876] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=505, diff=1, hw=0 hw_last=0
[ 110.492862] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=506, diff=1, hw=0 hw_last=0
[ 110.511836] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=507, diff=1, hw=0 hw_last=0
[ 110.530834] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=508, diff=1, hw=0 hw_last=0
[ 110.549815] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=509, diff=1, hw=0 hw_last=0
[ 110.568804] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=510, diff=1, hw=0 hw_last=0
[ 110.587783] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=511, diff=1, hw=0 hw_last=0
[ 110.606767] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=512, diff=1, hw=0 hw_last=0
[ 110.625753] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=513, diff=1, hw=0 hw_last=0
[ 110.644744] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=514, diff=1, hw=0 hw_last=0
[ 110.663726] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=515, diff=1, hw=0 hw_last=0
[ 110.682714] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=516, diff=1, hw=0 hw_last=0
[ 110.701703] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=517, diff=1, hw=0 hw_last=0
[ 110.720675] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=518, diff=1, hw=0 hw_last=0
[ 110.739660] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=519, diff=1, hw=0 hw_last=0
[ 110.758648] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=520, diff=1, hw=0 hw_last=0
[ 110.777627] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=521, diff=1, hw=0 hw_last=0
[ 110.796631] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=522, diff=1, hw=0 hw_last=0
[ 110.815605] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=523, diff=1, hw=0 hw_last=0
[ 110.834589] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=524, diff=1, hw=0 hw_last=0
[ 110.853582] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=525, diff=1, hw=0 hw_last=0
[ 110.872559] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=526, diff=1, hw=0 hw_last=0
[ 110.891544] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=527, diff=1, hw=0 hw_last=0
[ 110.910528] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=528, diff=1, hw=0 hw_last=0
[ 110.929505] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=529, diff=1, hw=0 hw_last=0
[ 110.948493] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=530, diff=1, hw=0 hw_last=0
[ 110.967477] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=531, diff=1, hw=0 hw_last=0
[ 110.986468] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=532, diff=1, hw=0 hw_last=0
[ 111.005450] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=533, diff=1, hw=0 hw_last=0
[ 111.024436] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=534, diff=1, hw=0 hw_last=0
[ 111.043408] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=535, diff=1, hw=0 hw_last=0
[ 111.062407] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=536, diff=1, hw=0 hw_last=0
[ 111.081396] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=537, diff=1, hw=0 hw_last=0
[ 111.100372] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=538, diff=1, hw=0 hw_last=0
[ 111.119353] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=539, diff=1, hw=0 hw_last=0
[ 111.138344] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=540, diff=1, hw=0 hw_last=0
[ 111.157329] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=541, diff=1, hw=0 hw_last=0
[ 111.176305] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=542, diff=1, hw=0 hw_last=0
[ 111.195292] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=543, diff=1, hw=0 hw_last=0
[ 111.214288] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=544, diff=1, hw=0 hw_last=0
[ 111.233272] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=545, diff=1, hw=0 hw_last=0
[ 111.252270] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=546, diff=1, hw=0 hw_last=0
[ 111.271233] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=547, diff=1, hw=0 hw_last=0
[ 111.290223] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=548, diff=1, hw=0 hw_last=0
[ 111.309205] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=549, diff=1, hw=0 hw_last=0
[ 111.328193] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=550, diff=1, hw=0 hw_last=0
[ 111.347168] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=551, diff=1, hw=0 hw_last=0
[ 111.366165] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=552, diff=1, hw=0 hw_last=0
[ 111.385146] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=553, diff=1, hw=0 hw_last=0
[ 111.404128] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=554, diff=1, hw=0 hw_last=0
[ 111.423108] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=555, diff=1, hw=0 hw_last=0
[ 111.442100] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=556, diff=1, hw=0 hw_last=0
[ 111.461091] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=557, diff=1, hw=0 hw_last=0
[ 111.480072] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=558, diff=1, hw=0 hw_last=0
[ 111.499048] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=559, diff=1, hw=0 hw_last=0
[ 111.518040] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=560, diff=1, hw=0 hw_last=0
[ 111.537032] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=561, diff=1, hw=0 hw_last=0
[ 111.556038] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=562, diff=1, hw=0 hw_last=0
[ 111.574994] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=563, diff=1, hw=0 hw_last=0
[ 111.593983] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=564, diff=1, hw=0 hw_last=0
[ 111.612964] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=565, diff=1, hw=0 hw_last=0
[ 111.631943] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=566, diff=1, hw=0 hw_last=0
[ 111.650929] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=567, diff=1, hw=0 hw_last=0
[ 111.669919] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=568, diff=1, hw=0 hw_last=0
[ 111.688906] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=569, diff=1, hw=0 hw_last=0
[ 111.707883] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=570, diff=1, hw=0 hw_last=0
[ 111.726876] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=571, diff=1, hw=0 hw_last=0
[ 111.745856] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=572, diff=1, hw=0 hw_last=0
[ 111.764840] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=573, diff=1, hw=0 hw_last=0
[ 111.783817] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=574, diff=1, hw=0 hw_last=0
[ 111.802814] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=575, diff=1, hw=0 hw_last=0
[ 111.821810] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=576, diff=1, hw=0 hw_last=0
[ 111.840788] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=577, diff=1, hw=0 hw_last=0
[ 111.859750] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=578, diff=1, hw=0 hw_last=0
[ 111.878749] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=579, diff=1, hw=0 hw_last=0
[ 111.897738] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=580, diff=1, hw=0 hw_last=0
[ 111.916717] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=581, diff=1, hw=0 hw_last=0
[ 111.935685] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=582, diff=1, hw=0 hw_last=0
[ 111.954685] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=583, diff=1, hw=0 hw_last=0
[ 111.973671] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=584, diff=1, hw=0 hw_last=0
[ 111.992660] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=585, diff=1, hw=0 hw_last=0
[ 112.011645] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=586, diff=1, hw=0 hw_last=0
[ 112.030636] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=587, diff=1, hw=0 hw_last=0
[ 112.049614] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=588, diff=1, hw=0 hw_last=0
[ 112.068600] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=589, diff=1, hw=0 hw_last=0
[ 112.087580] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=590, diff=1, hw=0 hw_last=0
[ 112.096068] [drm:vblank_disable_fn] disabling vblank on crtc 0
[ 112.096097] [drm:drm_update_vblank_count] updating vblank count on crtc 0: current=591, diff=0, hw=0 hw_last=0

RobertCNelson · November 19, 2021, 6:11pm

Interesting…

[ 2.217638] [drm] parse error at position 18 in video mode ‘1024x600@60,rotate=180’
[ 2.231364] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
[ 2.303516] [drm] No driver support for vblank timestamp query.

Looks like the rotate option isn’t valid… hum… i’ll have to read some more docs…

Regards,

sxramchnd · November 19, 2021, 6:17pm

Oh no, do I have to use xorg.conf?