Device Usage Page (usage_statistics_webtalk.html)

This HTML page displays the device usage statistics that will be sent to Xilinx.
 

 
Software Version and Target Device
Product Version: ISE:14.7 (WebPack) - P.20131013 Target Family: Spartan6
OS Platform: LIN64 Target Device: xc6slx16
Project ID (random number) 0e8848d5b53f4fd8aa5e820c14578733.CA4EE2C996C9505FBE1EDE2E90C483AA.73 Target Package: csg324
Registration ID 212374143_0_0_433 Target Speed: -2
Date Generated 2022-04-25T18:58:48 Tool Flow ISE
 
User Environment
OS Name Ubuntu OS Release Ubuntu 20.04.3 LTS
CPU Name Intel(R) Core(TM) i7-6700 CPU @ 3.40GHz CPU Speed 3407.999 MHz
OS Name Ubuntu OS Release Ubuntu 20.04.3 LTS
CPU Name Intel(R) Core(TM) i7-6700 CPU @ 3.40GHz CPU Speed 3407.999 MHz
 
Device Usage Statistics
Macro StatisticsMiscellaneous StatisticsNet StatisticsSite Usage
Adders/Subtractors=4
  • 14-bit subtractor=1
  • 3-bit subtractor=1
  • 4-bit adder=1
  • 8-bit adder=1
Comparators=9
  • 13-bit comparator equal=1
  • 14-bit comparator equal=1
  • 24-bit comparator greater=1
  • 8-bit comparator equal=1
  • 8-bit comparator greater=4
  • 8-bit comparator lessequal=1
Counters=2
  • 13-bit up counter=1
  • 24-bit up counter=1
FSMs=2 Multiplexers=134
  • 1-bit 2-to-1 multiplexer=123
  • 1-bit 8-to-1 multiplexer=2
  • 12-bit 4-to-1 multiplexer=4
  • 3-bit 2-to-1 multiplexer=1
  • 4-bit 2-to-1 multiplexer=2
  • 8-bit 2-to-1 multiplexer=2
Multipliers=1
  • 13x12-bit multiplier=1
Registers=179
  • Flip-Flops=179
MiscellaneousStatistics
  • AGG_BONDED_IO=6
  • AGG_IO=6
  • AGG_LOCED_IO=6
  • AGG_SLICE=58
  • NUM_BONDED_IOB=6
  • NUM_BSFULL=108
  • NUM_BSLUTONLY=66
  • NUM_BSREGONLY=10
  • NUM_BSUSED=184
  • NUM_BUFG=1
  • NUM_DSP48A1=1
  • NUM_LOCED_IOB=6
  • NUM_LOGIC_O5ANDO6=62
  • NUM_LOGIC_O5ONLY=15
  • NUM_LOGIC_O6ONLY=96
  • NUM_LUT_RT_DRIVES_CARRY4=1
  • NUM_LUT_RT_EXO6=1
  • NUM_LUT_RT_O6=15
  • NUM_SLICEL=21
  • NUM_SLICEX=37
  • NUM_SLICE_CARRY4=17
  • NUM_SLICE_CONTROLSET=12
  • NUM_SLICE_CYINIT=255
  • NUM_SLICE_F7MUX=4
  • NUM_SLICE_FF=136
  • NUM_SLICE_LATCHLOGIC=1
  • NUM_SLICE_UNUSEDCTRL=16
  • NUM_UNUSABLE_FF_BELS=32
NetStatistics
  • NumNets_Active=242
  • NumNets_Gnd=1
  • NumNets_Vcc=1
  • NumNodesOfType_Active_BOUNCEACROSS=3
  • NumNodesOfType_Active_BOUNCEIN=36
  • NumNodesOfType_Active_BUFGOUT=1
  • NumNodesOfType_Active_BUFHINP2OUT=5
  • NumNodesOfType_Active_CLKPIN=42
  • NumNodesOfType_Active_CLKPINFEED=5
  • NumNodesOfType_Active_CNTRLPIN=27
  • NumNodesOfType_Active_DOUBLE=231
  • NumNodesOfType_Active_GENERIC=10
  • NumNodesOfType_Active_GLOBAL=32
  • NumNodesOfType_Active_INPUT=27
  • NumNodesOfType_Active_IOBIN2OUT=7
  • NumNodesOfType_Active_IOBOUTPUT=7
  • NumNodesOfType_Active_LUTINPUT=698
  • NumNodesOfType_Active_OUTBOUND=240
  • NumNodesOfType_Active_OUTPUT=245
  • NumNodesOfType_Active_PADINPUT=5
  • NumNodesOfType_Active_PADOUTPUT=3
  • NumNodesOfType_Active_PINBOUNCE=120
  • NumNodesOfType_Active_PINFEED=763
  • NumNodesOfType_Active_QUAD=85
  • NumNodesOfType_Active_REGINPUT=16
  • NumNodesOfType_Active_SINGLE=336
  • NumNodesOfType_Gnd_BOUNCEIN=14
  • NumNodesOfType_Gnd_CNTRLPIN=1
  • NumNodesOfType_Gnd_DOUBLE=1
  • NumNodesOfType_Gnd_GENERIC=2
  • NumNodesOfType_Gnd_HGNDOUT=7
  • NumNodesOfType_Gnd_INPUT=105
  • NumNodesOfType_Gnd_IOBIN2OUT=2
  • NumNodesOfType_Gnd_IOBOUTPUT=2
  • NumNodesOfType_Gnd_OUTBOUND=1
  • NumNodesOfType_Gnd_OUTPUT=1
  • NumNodesOfType_Gnd_PADINPUT=2
  • NumNodesOfType_Gnd_PINBOUNCE=36
  • NumNodesOfType_Gnd_PINFEED=96
  • NumNodesOfType_Gnd_REGINPUT=8
  • NumNodesOfType_Gnd_SINGLE=1
  • NumNodesOfType_Vcc_CLKPIN=1
  • NumNodesOfType_Vcc_CNTRLPIN=1
  • NumNodesOfType_Vcc_HVCCOUT=29
  • NumNodesOfType_Vcc_INPUT=7
  • NumNodesOfType_Vcc_KVCCOUT=3
  • NumNodesOfType_Vcc_LUTINPUT=77
  • NumNodesOfType_Vcc_PINBOUNCE=2
  • NumNodesOfType_Vcc_PINFEED=84
SiteStatistics
  • BUFG-BUFGMUX=1
  • IOB-IOBM=3
  • IOB-IOBS=3
  • SLICEL-SLICEM=15
  • SLICEX-SLICEL=8
  • SLICEX-SLICEM=7
SiteSummary
  • BUFG=1
  • BUFG_BUFG=1
  • CARRY4=17
  • DSP48A1=1
  • DSP48A1_DSP48A1=1
  • FF_SR=23
  • HARD0=1
  • HARD1=3
  • IOB=6
  • IOB_IMUX=3
  • IOB_INBUF=3
  • IOB_OUTBUF=5
  • LUT5=77
  • LUT6=174
  • PAD=6
  • REG_SR=114
  • SELMUX2_1=4
  • SLICEL=21
  • SLICEX=37
 
Configuration Data
DSP48A1
  • CEA=[CEA_INV:0] [CEA:1]
  • CEB=[CEB_INV:0] [CEB:1]
  • CEC=[CEC:1] [CEC_INV:0]
  • CECARRYIN=[CECARRYIN_INV:0] [CECARRYIN:1]
  • CED=[CED_INV:0] [CED:1]
  • CEM=[CEM_INV:0] [CEM:1]
  • CEOPMODE=[CEOPMODE_INV:0] [CEOPMODE:1]
  • CEP=[CEP:1] [CEP_INV:0]
  • CLK=[CLK:1] [CLK_INV:0]
  • RSTA=[RSTA:1] [RSTA_INV:0]
  • RSTB=[RSTB:1] [RSTB_INV:0]
  • RSTC=[RSTC_INV:0] [RSTC:1]
  • RSTCARRYIN=[RSTCARRYIN_INV:0] [RSTCARRYIN:1]
  • RSTD=[RSTD_INV:0] [RSTD:1]
  • RSTM=[RSTM:1] [RSTM_INV:0]
  • RSTOPMODE=[RSTOPMODE_INV:0] [RSTOPMODE:1]
  • RSTP=[RSTP_INV:0] [RSTP:1]
DSP48A1_DSP48A1
  • A0REG=[0:1]
  • A1REG=[1:1]
  • B0REG=[0:1]
  • B1REG=[0:1]
  • B_INPUT=[DIRECT:1]
  • CARRYINREG=[0:1]
  • CARRYINSEL=[OPMODE5:1]
  • CARRYOUTREG=[0:1]
  • CEA=[CEA_INV:0] [CEA:1]
  • CEB=[CEB_INV:0] [CEB:1]
  • CEC=[CEC:1] [CEC_INV:0]
  • CECARRYIN=[CECARRYIN_INV:0] [CECARRYIN:1]
  • CED=[CED_INV:0] [CED:1]
  • CEM=[CEM_INV:0] [CEM:1]
  • CEOPMODE=[CEOPMODE_INV:0] [CEOPMODE:1]
  • CEP=[CEP:1] [CEP_INV:0]
  • CLK=[CLK:1] [CLK_INV:0]
  • CREG=[0:1]
  • DREG=[0:1]
  • MREG=[1:1]
  • OPMODEREG=[0:1]
  • PREG=[1:1]
  • RSTA=[RSTA:1] [RSTA_INV:0]
  • RSTB=[RSTB:1] [RSTB_INV:0]
  • RSTC=[RSTC_INV:0] [RSTC:1]
  • RSTCARRYIN=[RSTCARRYIN_INV:0] [RSTCARRYIN:1]
  • RSTD=[RSTD_INV:0] [RSTD:1]
  • RSTM=[RSTM:1] [RSTM_INV:0]
  • RSTOPMODE=[RSTOPMODE_INV:0] [RSTOPMODE:1]
  • RSTP=[RSTP_INV:0] [RSTP:1]
  • RSTTYPE=[SYNC:1]
FF_SR
  • CK=[CK:23] [CK_INV:0]
  • SRINIT=[SRINIT0:23]
  • SYNC_ATTR=[ASYNC:23]
IOB_OUTBUF
  • DRIVEATTRBOX=[12:5]
  • SLEW=[SLOW:5]
  • SUSPEND=[3STATE:5]
REG_SR
  • CK=[CK:113] [CK_INV:1]
  • LATCH_OR_FF=[FF:113] [AND2L:1]
  • SRINIT=[SRINIT0:109] [SRINIT1:5]
  • SYNC_ATTR=[ASYNC:99] [SYNC:15]
SLICEL
  • CLK=[CLK:15] [CLK_INV:1]
SLICEX
  • CLK=[CLK:26] [CLK_INV:0]
 
Pin Data
BUFG
  • I0=1
  • O=1
BUFG_BUFG
  • I0=1
  • O=1
CARRY4
  • CIN=12
  • CO0=2
  • CO1=1
  • CO3=13
  • CYINIT=5
  • DI0=16
  • DI1=15
  • DI2=14
  • DI3=13
  • O0=13
  • O1=12
  • O2=12
  • O3=12
  • S0=17
  • S1=15
  • S2=14
  • S3=14
DSP48A1
  • A0=1
  • A1=1
  • A10=1
  • A11=1
  • A12=1
  • A13=1
  • A14=1
  • A15=1
  • A16=1
  • A17=1
  • A2=1
  • A3=1
  • A4=1
  • A5=1
  • A6=1
  • A7=1
  • A8=1
  • A9=1
  • B0=1
  • B1=1
  • B10=1
  • B11=1
  • B12=1
  • B13=1
  • B14=1
  • B15=1
  • B16=1
  • B17=1
  • B2=1
  • B3=1
  • B4=1
  • B5=1
  • B6=1
  • B7=1
  • B8=1
  • B9=1
  • C0=1
  • C1=1
  • C10=1
  • C11=1
  • C12=1
  • C13=1
  • C14=1
  • C15=1
  • C16=1
  • C17=1
  • C18=1
  • C19=1
  • C2=1
  • C20=1
  • C21=1
  • C22=1
  • C23=1
  • C24=1
  • C25=1
  • C26=1
  • C27=1
  • C28=1
  • C29=1
  • C3=1
  • C30=1
  • C31=1
  • C32=1
  • C33=1
  • C34=1
  • C35=1
  • C36=1
  • C37=1
  • C38=1
  • C39=1
  • C4=1
  • C40=1
  • C41=1
  • C42=1
  • C43=1
  • C44=1
  • C45=1
  • C46=1
  • C47=1
  • C5=1
  • C6=1
  • C7=1
  • C8=1
  • C9=1
  • CEA=1
  • CEB=1
  • CEC=1
  • CECARRYIN=1
  • CED=1
  • CEM=1
  • CEOPMODE=1
  • CEP=1
  • CLK=1
  • D0=1
  • D1=1
  • D10=1
  • D11=1
  • D12=1
  • D13=1
  • D14=1
  • D15=1
  • D16=1
  • D17=1
  • D2=1
  • D3=1
  • D4=1
  • D5=1
  • D6=1
  • D7=1
  • D8=1
  • D9=1
  • OPMODE0=1
  • OPMODE1=1
  • OPMODE2=1
  • OPMODE3=1
  • OPMODE4=1
  • OPMODE5=1
  • OPMODE6=1
  • OPMODE7=1
  • P13=1
  • P14=1
  • P15=1
  • P16=1
  • P17=1
  • P18=1
  • P19=1
  • P20=1
  • P21=1
  • P22=1
  • P23=1
  • P24=1
  • RSTA=1
  • RSTB=1
  • RSTC=1
  • RSTCARRYIN=1
  • RSTD=1
  • RSTM=1
  • RSTOPMODE=1
  • RSTP=1
DSP48A1_DSP48A1
  • A0=1
  • A1=1
  • A10=1
  • A11=1
  • A12=1
  • A13=1
  • A14=1
  • A15=1
  • A16=1
  • A17=1
  • A2=1
  • A3=1
  • A4=1
  • A5=1
  • A6=1
  • A7=1
  • A8=1
  • A9=1
  • B0=1
  • B1=1
  • B10=1
  • B11=1
  • B12=1
  • B13=1
  • B14=1
  • B15=1
  • B16=1
  • B17=1
  • B2=1
  • B3=1
  • B4=1
  • B5=1
  • B6=1
  • B7=1
  • B8=1
  • B9=1
  • C0=1
  • C1=1
  • C10=1
  • C11=1
  • C12=1
  • C13=1
  • C14=1
  • C15=1
  • C16=1
  • C17=1
  • C18=1
  • C19=1
  • C2=1
  • C20=1
  • C21=1
  • C22=1
  • C23=1
  • C24=1
  • C25=1
  • C26=1
  • C27=1
  • C28=1
  • C29=1
  • C3=1
  • C30=1
  • C31=1
  • C32=1
  • C33=1
  • C34=1
  • C35=1
  • C36=1
  • C37=1
  • C38=1
  • C39=1
  • C4=1
  • C40=1
  • C41=1
  • C42=1
  • C43=1
  • C44=1
  • C45=1
  • C46=1
  • C47=1
  • C5=1
  • C6=1
  • C7=1
  • C8=1
  • C9=1
  • CEA=1
  • CEB=1
  • CEC=1
  • CECARRYIN=1
  • CED=1
  • CEM=1
  • CEOPMODE=1
  • CEP=1
  • CLK=1
  • D0=1
  • D1=1
  • D10=1
  • D11=1
  • D12=1
  • D13=1
  • D14=1
  • D15=1
  • D16=1
  • D17=1
  • D2=1
  • D3=1
  • D4=1
  • D5=1
  • D6=1
  • D7=1
  • D8=1
  • D9=1
  • OPMODE0=1
  • OPMODE1=1
  • OPMODE2=1
  • OPMODE3=1
  • OPMODE4=1
  • OPMODE5=1
  • OPMODE6=1
  • OPMODE7=1
  • P13=1
  • P14=1
  • P15=1
  • P16=1
  • P17=1
  • P18=1
  • P19=1
  • P20=1
  • P21=1
  • P22=1
  • P23=1
  • P24=1
  • RSTA=1
  • RSTB=1
  • RSTC=1
  • RSTCARRYIN=1
  • RSTD=1
  • RSTM=1
  • RSTOPMODE=1
  • RSTP=1
FF_SR
  • CE=20
  • CK=23
  • D=23
  • Q=23
HARD0
  • 0=1
HARD1
  • 1=3
IOB
  • I=3
  • O=5
  • PAD=6
  • T=2
IOB_IMUX
  • I=3
  • OUT=3
IOB_INBUF
  • OUT=3
  • PAD=3
IOB_OUTBUF
  • IN=5
  • OUT=5
  • TRI=2
LUT5
  • A1=24
  • A2=24
  • A3=24
  • A4=8
  • A5=26
  • O5=77
LUT6
  • A1=54
  • A2=88
  • A3=111
  • A4=160
  • A5=158
  • A6=172
  • O6=174
PAD
  • PAD=6
REG_SR
  • CE=78
  • CK=114
  • D=114
  • Q=114
  • SR=16
SELMUX2_1
  • 0=4
  • 1=4
  • OUT=4
  • S0=4
SLICEL
  • A=3
  • A1=3
  • A2=4
  • A3=5
  • A4=17
  • A5=17
  • A6=20
  • AMUX=6
  • AQ=13
  • AX=4
  • B=4
  • B1=5
  • B2=6
  • B3=6
  • B4=16
  • B5=15
  • B6=19
  • BMUX=3
  • BQ=11
  • BX=2
  • C1=6
  • C2=6
  • C3=6
  • C4=15
  • C5=15
  • C6=18
  • CE=7
  • CIN=12
  • CLK=16
  • CMUX=6
  • COUT=12
  • CQ=11
  • CX=6
  • D1=4
  • D2=5
  • D3=6
  • D4=15
  • D5=14
  • D6=18
  • DMUX=3
  • DQ=10
  • DX=2
  • SR=6
SLICEX
  • A=11
  • A1=18
  • A2=20
  • A3=25
  • A4=27
  • A5=26
  • A6=26
  • AMUX=6
  • AQ=19
  • AX=3
  • B=11
  • B1=16
  • B2=19
  • B3=23
  • B4=25
  • B5=26
  • B6=26
  • BMUX=7
  • BQ=19
  • BX=2
  • C=12
  • C1=15
  • C2=20
  • C3=24
  • C4=25
  • C5=25
  • C6=25
  • CE=15
  • CLK=26
  • CMUX=6
  • CQ=17
  • CX=2
  • D=9
  • D1=11
  • D2=13
  • D3=19
  • D4=20
  • D5=20
  • D6=20
  • DMUX=7
  • DQ=14
  • DX=3
  • SR=1
 
Tool Usage
Command Line History
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc6slx16-csg324-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx16-csg324-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
 
Software Quality
Run Statistics
Program NameRuns StartedRuns FinishedErrorsFatal ErrorsInternal ErrorsExceptionsCore Dumps
_impact 14 14 0 0 0 0 0
bitgen 435 434 0 0 0 0 0
map 457 437 0 0 0 0 0
ngdbuild 480 478 0 0 0 0 0
par 436 434 0 0 0 0 0
trce 429 428 0 0 0 0 0
xst 726 716 0 0 0 0 0
 
Help Statistics
Help files
/doc/usenglish/isehelp/pn_db_design_properties.htm ( 1 )
 
Project Statistics
PROP_Enable_Message_Filtering=false PROP_FitterReportFormat=HTML
PROP_LastAppliedGoal=Balanced PROP_LastAppliedStrategy=Xilinx Default (unlocked)
PROP_ManualCompileOrderImp=false PROP_PropSpecInProjFile=Store all values
PROP_Simulator=ISim (VHDL/Verilog) PROP_SynthTopFile=changed
PROP_Top_Level_Module_Type=HDL PROP_UseSmartGuide=false
PROP_UserConstraintEditorPreference=Text Editor PROP_VHDLSourceAnalysisStandard=VHDL-200X
PROP_intProjectCreationTimestamp=2022-04-14T19:44:25 PROP_intWbtProjectID=CA4EE2C996C9505FBE1EDE2E90C483AA
PROP_intWbtProjectIteration=73 PROP_intWorkingDirLocWRTProjDir=Same
PROP_intWorkingDirUsed=No PROP_lockPinsUcfFile=changed
PROP_xilxBitgStart_IntDone=true PROP_AutoTop=true
PROP_DevFamily=Spartan6 PROP_DevDevice=xc6slx16
PROP_DevFamilyPMName=spartan6 PROP_DevPackage=csg324
PROP_Synthesis_Tool=XST (VHDL/Verilog) PROP_DevSpeed=-2
PROP_PreferredLanguage=Verilog FILE_UCF=1
FILE_VHDL=8
 
Unisim Statistics
NGDBUILD_PRE_UNISIM_SUMMARY
NGDBUILD_NUM_BUFGP=1 NGDBUILD_NUM_DSP48A1=1 NGDBUILD_NUM_FD=24 NGDBUILD_NUM_FDE=97
NGDBUILD_NUM_FDR=14 NGDBUILD_NUM_FDS=1 NGDBUILD_NUM_GND=1 NGDBUILD_NUM_INV=12
NGDBUILD_NUM_IOBUF=2 NGDBUILD_NUM_LUT1=16 NGDBUILD_NUM_LUT2=33 NGDBUILD_NUM_LUT3=9
NGDBUILD_NUM_LUT4=58 NGDBUILD_NUM_LUT5=19 NGDBUILD_NUM_LUT6=54 NGDBUILD_NUM_MUXCY=58
NGDBUILD_NUM_MUXF7=4 NGDBUILD_NUM_OBUF=3 NGDBUILD_NUM_VCC=1 NGDBUILD_NUM_XORCY=49
NGDBUILD_POST_UNISIM_SUMMARY
NGDBUILD_NUM_BUFG=1 NGDBUILD_NUM_DSP48A1=1 NGDBUILD_NUM_FD=24 NGDBUILD_NUM_FDE=97
NGDBUILD_NUM_FDR=14 NGDBUILD_NUM_FDS=1 NGDBUILD_NUM_GND=1 NGDBUILD_NUM_IBUF=2
NGDBUILD_NUM_IBUFG=1 NGDBUILD_NUM_INV=12 NGDBUILD_NUM_LUT1=16 NGDBUILD_NUM_LUT2=33
NGDBUILD_NUM_LUT3=9 NGDBUILD_NUM_LUT4=58 NGDBUILD_NUM_LUT5=19 NGDBUILD_NUM_LUT6=54
NGDBUILD_NUM_MUXCY=58 NGDBUILD_NUM_MUXF7=4 NGDBUILD_NUM_OBUF=3 NGDBUILD_NUM_OBUFT=2
NGDBUILD_NUM_VCC=1 NGDBUILD_NUM_XORCY=49
 
XST Command Line Options
XST_OPTION_SUMMARY
-ifn=<fname>.prj -ofn=<design_top> -ofmt=NGC -p=xc6slx16-2-csg324
-top=<design_top> -opt_mode=Speed -opt_level=1 -power=NO
-iuc=NO -keep_hierarchy=No -netlist_hierarchy=As_Optimized -rtlview=Yes
-glob_opt=AllClockNets -read_cores=YES -write_timing_constraints=NO -cross_clock_analysis=NO
-bus_delimiter=<> -slice_utilization_ratio=100 -bram_utilization_ratio=100 -dsp_utilization_ratio=100
-reduce_control_sets=Auto -fsm_extract=YES -fsm_encoding=Auto -safe_implementation=No
-fsm_style=LUT -ram_extract=Yes -ram_style=Auto -rom_extract=Yes
-shreg_extract=YES -rom_style=Auto -auto_bram_packing=NO -resource_sharing=YES
-async_to_sync=NO -use_dsp48=Auto -iobuf=YES -max_fanout=100000
-bufg=16 -register_duplication=YES -register_balancing=No -optimize_primitives=NO
-use_clock_enable=Auto -use_sync_set=Auto -use_sync_reset=Auto -iob=Auto
-equivalent_register_removal=YES -slice_utilization_ratio_maxmargin=5