# Digital Switching: Transistor Saturation and Forced Beta

Transistors are often used as controlled switches in digital circuits. For example, a transistor may be used as a buffer, allowing a microcontroller to activate a relay or LED. For these digital applications, we want the transistor to be saturated (fully turned on) so that the collector-to-emitter terminals appear as a short circuit; like a closed switch, current is free to flow across the transistor.

In this post, we will explore saturation and the complications arising from nonlinear response of the transistor’s beta, especially at higher collector currents. This is done in two steps. Initially, we will design a circuit with the base current set to 10% of the collector current. We then refine this circuit using datasheet specifications to better understand trends and make qualitative statements supporting the use of forced beta.

A simple answer is to design a circuit using the forced beta condition. We select the circuit components so that the base current is 10% of the collector current. To illustrate this point, suppose we have a 24 VDC relay with a 120 Ω coil resistance.

I_C = \dfrac{24 \ V }{120 \ \Omega} \approx 200\, mA

For a forced beta condition, we design for a base current that is 10% of the collector current. If we assume the transistor is driven by a 3.3 VDC microcontroller, the base resistor is calculated as:

R_{Base} = \dfrac{V_{Supply} \ –\ V_{Diode}}{I_{Base}} = \dfrac{3.3 \ – \ 0.7}{0.02} = 130 \ \Omega

At this point, we select an NPN transistor with a safety margin and construct the circuit as shown in this schematic. Given the 24 VDC source with a 200 mA load, the MPSA06 transistor is a reasonable fit. It has a 500 mA current limit with a V_{CE(Max) } of 80 VDC.

Before finishing, we need to take another look at the MPSA06 transistor’s datasheet to refine our V_{BE} estimate. I’m sure you have been told that this base to emitter voltage may be approximated by 0.6 or 0.7 VDC. However, that is not always the case, especially for a transistor in saturation operating in the higher end of its current range.

This chart shows the relationship between the base to emitter voltage for a saturated ( \beta = 10) transistor as a function of collector current. We can clearly see a rise in voltage as collector current increases. Based on this data, we can expect V_{BE} to be approximately 0.85 VDC for our chosen collector current (green circle). Recalculating for the base resistor:

R_{Base} = \dfrac{V_{Supply} – V_{Diode}}{I_{Base}} = \dfrac{3.3 \ – \ 0.85}{0.02} \approx 120\, \Omega

Returning back to the schematic, we note this refined lower resistance by striking a red line through the original 130 Ω resistor and replacing it with a more appropriate 130 Ω value.

There is yet another way to answer this question from the datasheet. This “hockey stick” graphic presents saturation curves where V_{CE} is a function of the base current.

This is an important graph that helps explain the concept of saturation. Please consider the 10 mA curve. There is a sharp inflection point (knee) in the data for B = 100 (10 mA collector current divided by the 0.1 mA base current). A slight move to the left and the transistor enters the linear range. A move to the right shows no appreciable change. Stated another way, once the transistor is in saturation, increasing base current only increases the saturation level.

Observe that the transistor does not easily enter saturation for higher current levels. instead of a sharp knee we encounter a rounded transition between the linear and saturation boundaries. Our chosen operating point highlighted by the green circle appears to be within the saturation.

Tech Tip: Do pay attention to the datasheet saturation boundaries and the closely related concept of transistor gain. As an example, consider my difficulties with this LED multiplexing circuit. Improper assumptions about the transistor’s operation resulted in a display that changed brightness depending on the number of active LEDs.

There is a temptation to reduce the base current as much as possible so that the transistor is operating at the knee. This will save power that would otherwise be wasted as heat in the base to emitter junction. However, this is not a reliable operating point as variations in transistors and temperature effects can slide the transistor into the linear range. This could cause the transistor to overheat or reduce the voltage drop across the load.

## Parting Thoughts:

The forced beta calculation may be used to place a transistor into saturation. However, we must always consult the transistor’s datasheet to determine if our assumed operating point is correct especially as we operate the transistor in its higher current range. Finally, we note that there is a balance between excessive base current and the need to maintain saturation for all component and temperature variations.

Best Wishes,

APDahlen

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Hello Prof. Dahlen,

For R1 on the schematic, I do not understand how you arrived at 180 Ohms. Was that just a made-up resistance for example’s sake, or is there a reason the variable resistor sits at 180 Ohms?

Hello Victoria,

Originally, we chose 120 Ω based on an assumed forced beta condition with a V_{BE} of 0.7 VDC . Data sheet exploration revealed that that V_{BE} is closer to 0.85 VDC requiring a recalculation of the resistor.

It’s a subtle point, but good to know that V_{BE} is not the constant we often assume it to be.

You are correct. It does look somewhat like a variable resistor. The intent was to say “120 Ω goes to 130 Ω.”

Cordially,

Aaron

P.S. You may be interested in the Baker clamp. It’s a closely related concept regarding transistor saturation. It uses a clever feedback mechanism, typically with a Schottky diode, to clamp the base voltage to the collector thereby holding the transistor at the edge of saturation. The result is a device with faster turn-off speed.

Hello @Matsumura_9111 and @Victoria_14394,