Breadboard Current Limitations with Terminal Block Alternatives

Return to the breadboard guide for additional construction tips.

This article presents the industrial terminal block as an alternative to the solderless breadboard. This allows quick and easy prototype designs for high current circuits.

What are the breadboard limitations?

In a previous post I suggested that a breadboard’s current be limited to approximately 1 A. This limitation is based on the internal power dissipation and is necessary to prevent overheating of the breadboard itself. This self-heating is a combination of I^2R losses in the breadboard wire matrix and the junction resistance at the component-to-breadboard junction. As stated in that article, a new, unused breadboard may be modeled as 10 mΩ per contact and 11 mΩ per inch.

While that is a perfectly reasonable approach to prevent breadboard melting, it does nothing to address precision measurements in a system with moderate current. A perfect example is my recent attempts to demonstrate a cell balancing system for a series connected string of hybrid Lithium-ion Capacitor (LiC) hybrid supercapacitor. My first attempt is shown in Figure 1. Here, the Eaton LiC devices are mounted in the breadboard with wires leading to the Arduino Nano Every.

Figure 1: Picture of the hybrid Lithium-ion capacitors installed on a breadboard.

Problems with breadboard voltage drop due to high current

In theory, this should be an acceptable circuit. The breadboard can certainly handle the current. The charging current is current limited to 150 mA. The test discharge circuit consists of a single 10 Ω resistor. The resulting maximum current is 1.14 A calculated as:

I_{Max} = \dfrac {3 * 3.8 \ VDC}{10 \ \Omega}

Where 3.8 VDC is the fully charged voltage for each of the series connected capacitors.

The initial results for a capacitor discharge test are shown in Figure 2. For this test a 10 Ω resistor is connected to the capacitor bank at time zero. The calculated voltage for each capacitor drops with an undesirable difference for each capacitor.

Tech Tip: The data collection system featured in this article is ground referenced. Given the series connected string, direct measurement of the capacitor is not possible. Instead, we measure C3, C3 + C2, and C3 + C2 + C1. The voltage for each capacitor is calculated from these three measurements. For example, C1 voltage is measured as (C3 + C2 + C1) – (C3 + C2).

Figure 2: Apparent unbalanced capacitor measurement due to breadboard resistance.

Earlier, we stated that the breadboard may be modeled as 10 mΩ per contact and 11 mΩ per inch. A close look at Figure 1 reveals that there are 10 wired connections to the breadboard. There are an additional two connections for the load (not shown). Assuming a new breadboard with a combined two inches of wire length and 12 physical connections, the total breadboard resistance is calculated as:

R_{Breadboard} = 12 * 0.01 + 2 * 0.011 \approx 140 \ m\Omega

The measured difference in the capacitor voltages at time zero is concerning. The breadboard resistance certainly accounts for some of the discrepancy. We can do better.

Improved connections using industrial terminal blocks

At this point, we could solder the capacitors to lower the resistance. That would certainly be a valid construction method. Yet, solder is an undesirable construction method when prototyping with an energy storage system. It’s better to retain the ability to quickly remove the component and place it back into its protective shield as pictured in this article.

One useful method of lowering the connection resistance while retaining the ability to quickly disassemble the circuit is to use industrial terminal blocks as pictured in Figure 3. With screw tightened clamps able to withstand in excess of 25 A, the blocks provide a solid low resistance. The results are shown in Figure 4.

Figure 3: Use of industrial terminal blocks to lower resistance.

Tech Tip: The orange piece between the terminal block is a dual-position jumper. This extra device ties two blocks together. This action doubles the number of terminal connections for the given node. In this application it allows easy connection for the load (not shown).

As we focus on the left side of the graph, we see that the initial voltage drop is consistent across all capacitors. The capacitors remain balanced throughout the bulk of their discharge cycle. The deviation only occurs as the capacitors near their design maximum 2.2 VDC cutoff voltage.

Figure 4: Improved balance with reduction in Breadboard resistance.

Parting thoughts

The solderless breadboard provides a convenient prototyping method for small signal devices. While the breadboard is tolerant of currents of up to 1A, there will still be undesirable voltage drops. Many times, these can be ignored but not always, as demonstrated in this article. There are several alternatives including soldering the components, or the industrial DIN rail mounted terminal blocks featured in this article.

Best Wishes,


Return to the breadboard guide for additional construction tips.