Cannot claim full 16G of EMMC

Hi Robert,

We have new rev C boards with 16G EMMC. It was the same part as our Rev B board.
On Rev B, I run your sudo /opt/scripts/tools/grow_partition.sh and the Linux was able to expand to full 16G. But some how on our Rev C, it only expands to 5G.

image

The P/N for EMMC is EMMC16G-TB29-90F02
Any suggestions that something is possibly wrong?

Thank You,
David

HI @dzhou , what does the silk screen on the eMMC show? (picture? )

These two numbers match (off by 1…)

emmc

So Linux see’s only a 4.9GiB drive… So it’s not the script, i’m thinking something is funny about the eMMC…

Regards,

Hi Robert,

I agree with you that it is not the script. The script expands from 3.5G to 4.9G, it does as it supposes to do.
If it is the addresses, I thought it shall be something like 8G, not 5G. If it is bad EMMC chip, it still hard to think of 4.9G.
I have to try more boards, to see if they are consistent.
Best Regards,
David

I just tried mmc-utils from debian, this application doesn’t show much more info… The mmc info in u-boot might be useful.

You might want to ping where you got these chips, they are either defective, or maybe counterfeit???

Regards,

Hi Robert,
Thank you for your suggestions.
I will try more boards, which may give us some clues. Or as you suggested, using u-boot to dig out some error codes or do more testing.

Best Regards,
David

Hi Robert,

I found that the EMMC on the Rev C board, which only claimed 4.9G out of 16G Capacity is in Enhanced Mode ( from u-boot mmc ) :
User Capacity: 4.9 GiB ENH
User Enhanced Start: 0 Bytes
User Enhanced Size: 4.9 GiB

It may use mmc-utils to be reconfigured?
There are a few questions in mind:
The enhanced mode is default for ‘enhanced version’ of EMMC?
Why only 4.9 visible under enhanced mode?
How to claim the rest or how to change to non-enhanced mode?

Best Regards,

David

Cool pseudo SLC mode! :wink:

I have no idea, this is first I’ve found out eMMC support this mode… Does the manufacture have any configuration guides to convert to to normal?

it looks like u-boot supports changing this…

Regards,

Hi Robert,

I found this data sheet:
https://www.verical.com/datasheet/kingston-technology-emmc-emmc16g-tb29-pz90-6583060.pdf

It has hwpartition u-boot cmd or mmc-utils as you suggested. I haven’t got chance to try it out. I am still having wifi issue, (service is loaded ok, but no wlan0 interface device). Without WIFI, it is hard to install tools for use.

Best Regards,
David

Hi Robert,
In the pdf, it says:

The device capacity is reduced by 2/3 of the capacity. 5G is about 16/3 G. So in pSLC mode, 4.9G is all claimed. Am I right?

David

Correct, so with the correct mmc command you should be able to put it in TLC mode to get all 16GB… This is all new, i shared it with the old Beagle developers, we haven’t had to deal with an eMMC like this yet…

Regards,

Hi Robert,

Thank you for your confirmation.
Later, I would like to make it multiple partitions. One for Linux O/S, which is more static after being flashed. One for user partition, which may constantly updates with pSLC mode. That way we have balanced performance and space.

Best Regards,
David

Hi Robert,

I got some feedback from Kingston regarding EMMC pSLC configuration, I thought you might be interested in the info. I would like to share it with you.
( the Jesd84-B51.pdf too large to upload)

EMMC16G-TB29-90F01 is standard configuration chip P/N
EMMC16G-TB29-90F02 is pSLC configuration chip P/N

  1. EMMC Chip with EMMC16G-TB29-90F01 is in standard configuration ONLY?

This is the standard configuration. Standard configurations can be set to pSLC mode which is a one-time-programmable (OTP) operation and cannot be undone. All data is lost when converting to pSLC.
EMMC16G-TB29-90F01
eMMC 5.1
Standard Temp. -25C to +85C
Package 11.5 x 13.0 x 0.8 mm
Native 3D TLC NAND Flash
Sector count 30,621,696 = 30,621,696 * 512 = 15,678,308,352 Bytes

  1. EMMC Chip with EMMC16G-TB29-90F02 is in pSLC as default? Is it possible to be re-partitioned as mixed ( some as standard, and some as pSLC) ?

This part is set as pSLC mode from the factory. Standard configured parts can be set to have a mix of standard and pSLC sections. Once set in pSLC it cannot be undone due to the OTP nature.

Section “6.2.4 Configure partitions” of the JEDEC standard (attached) describes how to set pSLC which they call “Enhanced User Data Area”.

EMMC16G-TB29-90F02
eMMC 5.1
Standard Temp. -25C to +85C
Package 11.5 x 13.0 x 0.8 mm
Native 3D TLC NAND Flash converted to pSLC.
Sector count 10,207,232 = 10,207,232 * 512 = 5,226,102,784 Bytes

Best Regards,

David

Ouch, so “F02” is 16G eMMC in pSLC mode via a one time programmable option… They should really rename the part number as “5.9G” vs “16G”… As that is so confusing, as you don’t get all 16G…

Regards,

Hello dzhou,

I am using EMMC16G-TB29-90F01 eMMC on i.MX6UL evk nxp board . Can you please share the procedure for configuring the eMMC in device tree and uboot and please share the datasheet of EMMC16G-TB29-90F01.

Thnaks & Regards
shammi

Hi Shami,

I didn’t make any changes to the device tree for eMMC EMMC16G-TB29-90F01.

My dev board is digi board not nxp board. On digi board, emmc and sd card is shared with circuits, so only one can be enabled.

You can make changes into imx6ul-ccimx6ulsbc.dts and .dtsi files

/* USDHC2 (microSD, conflicts with eMMC) */

/*
&usdhc2 {
	pinctrl-assert-gpios = <&gpio5 1 GPIO_ACTIVE_LOW>;
	broken-cd; // no carrier detect line (use polling)
	status = "okay";
}; */

/* USDHC2 (eMMC, conflicts with microSD) */

&usdhc2 {
	pinctrl-assert-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
	// , <&gpio5 2 GPIO_ACTIVE_HIGH>;
	// frc added
	non-removable;
	broken-cd;
	pinctrl-names = "default";
	fsl,delay-line = <0>;
	no-1-8-v;
	max-frequency = <50000000>;
	keep-power-in-suspend;
	pinctrl-0 = <&pinctrl_usdhc2_8databits>;
	bus-width = <8>;
	status = "okay";
};

pinctrl_usdhc2: usdhc2grp {
	fsl,pins = <
		MX6UL_PAD_CSI_HSYNC__USDHC2_CMD 0x17059
		MX6UL_PAD_CSI_VSYNC__USDHC2_CLK 0x10039
		MX6UL_PAD_CSI_DATA00__USDHC2_DATA0 0x17059
		MX6UL_PAD_CSI_DATA01__USDHC2_DATA1 0x17059
		MX6UL_PAD_CSI_DATA02__USDHC2_DATA2 0x17059
		MX6UL_PAD_CSI_DATA03__USDHC2_DATA3 0x17059

		/* Mux selector between eMMC/SD# */
		MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x79
	>;
};

pinctrl_usdhc2_8databits: usdhc2-8databits-grp {
	fsl,pins = <
		MX6UL_PAD_CSI_HSYNC__USDHC2_CMD 0x17011
		MX6UL_PAD_CSI_VSYNC__USDHC2_CLK 0x10029
		MX6UL_PAD_CSI_DATA00__USDHC2_DATA0 0x17059
		MX6UL_PAD_CSI_DATA01__USDHC2_DATA1 0x17059
		MX6UL_PAD_CSI_DATA02__USDHC2_DATA2 0x17059
		MX6UL_PAD_CSI_DATA03__USDHC2_DATA3 0x17059
		MX6UL_PAD_CSI_DATA04__USDHC2_DATA4 0x17059
		MX6UL_PAD_CSI_DATA05__USDHC2_DATA5 0x17059
		MX6UL_PAD_CSI_DATA06__USDHC2_DATA6 0x17059
		MX6UL_PAD_CSI_DATA07__USDHC2_DATA7 0x17059

		/* Mux selector between eMMC/SD# */
		MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x79
		MX6UL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x79
	>;
};

Then, bitbake again.

Hope that helps,

David

image001.jpg

Hi dzhou,

i found the following node in imx6ul.dtsi

              usdhc2: usdhc@2194000 {
                                compatible = "fsl,imx6ul-usdhc", "fsl,imx6sx-usdhc";
                                reg = <0x02194000 0x4000>;
                                interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
                                clocks = <&clks IMX6UL_CLK_USDHC2>,
                                         <&clks IMX6UL_CLK_USDHC2>,
                                         <&clks IMX6UL_CLK_USDHC2>;
                                clock-names = "ipg", "ahb", "per";
                                bus-width = <8>;
                                fsl,tuning-step = <2>;
                                fsl,tuning-start-tap = <20>;
                                status = "disabled";
                        };

and the below node in imx6ul-14x14-evk.dtsi

&usdhc2 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_usdhc2>;
        non-removable;
        keep-power-in-suspend;
        wakeup-source;
        bus-width = <8>;
        status = "okay";
};

Do i have to change anything from this files ?
Please let me know if any

Thanks & Regards
Shammi

Hi Shammi,

First, I don’t know what is your problem with the EMMC chip you are using. If EMMC is already configured, then there is nothing to change. If you need to add EMMC into the system, then the best way is to find the device configuration for EMMC from NXP source for your dev board, they must have a version of source for the dev board you are using. As far as bitbake process, you shall also follow nxp bitbaking procedures. NXP has pretty good custom support. I made changes on eMMC device tree, because DIGI device tree has a parameter mismatch for the EMMC we are using, and I got hint from NXP IMX6UL experts. My advice is to file a tick to NXP support, they will give you specific info.

Regards,

David

image001.jpg

Based on your *.dts files, eMMC is enabled… Are you not seeing the mmc node in linux, or? Did you modify the imx6ul-14x14-evk?

Regards,

We are using imx6ul-ccimx6ulsbc.dtsi and .dts files.

Regards

image001.jpg

image002.jpg

In our board, we disabled SD card, when Kernel is loaded. We were using eMMC, and we found there was eMMC R/W I/O block error, with large files (say >25M). That was reason, I modified some parameters for eMMC pins in the device tree. The modification was confirmed by DIGI engineering team and fixed R/W error. Then we found the eMMC still failed at very low temperature. (<-10 C). At the end, we removed eMMC, just used on-chip flash.

Best Regards,

David