'CCC...' is not displayed in uart0 booting mode

Hi Robert,

I have hard time to get BBBw into uart0 console booting mode. It was working by the following sequence:
Connect console UART0 to a host ternimal
Press and Hold boot button,
Plug in power ( I plugged in the micro usb for powering up the BBB)

I am expecting ‘CCC…’ to be shown on the host terminal window

I tried several units, and waited over 2 minute. ‘CCC…’ are not displayed.
(Maybe timeout is longer than 2 minutes?

What else did I miss?

Thank you,

There is no timeout, it should be pretty quick. With the BOOT button held down the order is:

  1. SPI0
  2. MMC0
  3. USB0
  4. UART0

So if you don’t see “CCC” it’s either booting up in MMC0 or USB0…


Thank you, Robert. It is very quick to switch to usb boot mode. But the cycle time from uart0 to usb mode takes very long time. (Or from uart0 to next uart0 mode takes long time). I didn’t measure, it is more than 2 minutes, probably.


Hi Robert,

I am working on our production board first time. Currently micro usb port is not working, so I trying to get uart0 going, which can confirm chip is up running ok. But I found that the MLO is successfully downloaded, and it fails to download u-boot.img (the second stage u-boot file, using YMODEM). I tried tera term. It just hungs when it trying to download u-boot.img. Later, I tried picocom. It seems to me that uart0 port is working ok under ROM, but not under the MLO. (posted error messages):
$ sx -vv u-boot.img
Sending u-boot.img, 6056 blocks: Give your local XMODEM receive command now.
Xmodem sectors/kbytes sent: 0/ 0kRetry 0: Timeout on sector ACK
Retry 0: Timeout on sector ACK
Retry 0: Timeout on sector ACK
Retry 0: Timeout on sector ACK
Retry 0: Timeout on sector ACK
Retry 0: Timeout on sector ACK
Retry 0: Timeout on sector ACK
Retry 0: Timeout on sector ACK
Retry 0: Timeout on sector ACK
Retry 0: Timeout on sector ACK
Retry 0: Timeout on sector ACK
Retry 0: Retry Count Exceeded

Transfer incomplete

*** exit status: 128 ***

FATAL: read zero bytes from port
term_exitfunc: reset failed for dev UNKNOWN: Input/output error

I am wandering the clock frequency is set to 24MHZ is right?
00 = 19.2 MHz
01 = 24 MHz
10 = 25 MHz
11 = 26 MHz
Or what else is needed at hardware configuration level to be functional for MLO?

On the other hand, at the ‘ccc…’ is continuously displayed with/without Boot Button is pressed. The NDIS driver is never initiated. Certainly it is related to our hardware. And it is our production board. Your input and suggestion are greatly appreciated.


Hi @dzhou,

24Mhz is correct.

Sorry, i’ve never done a usart0 based boot method on the AM335x. I know you need to reconfigure the MLO/u-boot.img build of u-boot. At one time there was uart specific configs for am335x_evm, but i don’t think those unique config’s are in the latest branches anymore.


Hi Robert,

Thank you for your confirmation of frequency and input.
I am working on software. There is usb issue with the first board. The uart0 boot method is to identify bare board issues. Eventually, usb will be used.
Best Regards,


Hi @dzhou Did some more git research on this, looks like we never had a ‘usart’ config in mainline.

We had spi, and usb based booting:


But both of these have been removed from git.


Hi Robert,

Thank you for your info.
I have two questions related to this. In the

  • From TeraTerm Menu click “ File -> Transfer -> Kermit -> Send ”.
  • Select the 1st stage u-boot image “ MLO ” and click “OPEN” button
    But many other places, to download
    u-boot-spl.bin instead of MLO
    use Kermit for both instead of (XModem for 1st Stage and YModem for 2nd Stage)

When I download MLO, the u-boot.img will not start to download.
When I download u-boot-spl.bin, the u-boot.img will start, but it stops , got an timeout ACK

Thank you,


Hi Robert,

With tera term, using XModem and Ymodem, to download u-boot-spl.bin and u-boot.img, works OK. Both images have to be uart_spl configuration.



Hi @dzhou, that was a little painful, but i also got it working:

Using v2020.10-rc3 of https://github.com/u-boot/u-boot with the default am335x_evm_defconfig so no changes required.

On Debian install:

sudo apt install picocom lrzsz

Verify board is sending a string of “CCC’s”…
Un-power board, make sure it’s powered down

Start Picocom:

picocom -b 115200 /dev/ttyUSB0 --send-cmd "sx -vv"

In picocom, Press CTRL+A; CTRL+S; transfer u-boot-spl.bin from u-boot/spl/

Plug in/power board, and wait for transfer to complete:

Press CTRL+A; CTRL+S; transfer u-boot.img

picocom -b 115200 /dev/ttyUSB0 --send-cmd "sx -vv"
picocom v3.1

port is        : /dev/ttyUSB0
flowcontrol    : none
baudrate is    : 115200
parity is      : none
databits are   : 8
stopbits are   : 1
escape is      : C-a
local echo is  : no
noinit is      : no
noreset is     : no
hangup is      : no
nolock is      : no
send_cmd is    : sx -vv
receive_cmd is : rz -vv -E
imap is        : 
omap is        : 
emap is        : crcrlf,delbs,
logfile is     : none
initstring     : none
exit_after is  : not set
exit is        : no

Type [C-a] [C-h] to see available commands
Terminal ready

*** file: u-boot-spl.bin
$ sx -vv u-boot-spl.bin
Sending u-boot-spl.bin, 848 blocks: Give your local XMODEM receive command now.
Bytes Sent: 108672   BPS:6882                            

Transfer complete

*** exit status: 0 ***

U-Boot SPL 2020.10-rc3 (Sep 02 2020 - 12:24:07 -0500)
Trying to boot from UART
*** file: u-boot.img
$ sx -vv u-boot.img
Sending u-boot.img, 6107 blocks: Give your local XMODEM receive command now.
Xmodem sectors/kbytes sent:   0/ 0kRetry 0: NAK on sector
Bytes Sent: 781824   BPS:7632                            

Transfer complete

*** exit status: 0 ***
xyzModem - CRC mode, 6109(SOH)/0(STX)/0(CAN) packets, 4 retries
Loaded 781724 bytes

U-Boot 2020.10-rc3 (Sep 02 2020 - 12:24:07 -0500)

CPU  : AM335X-GP rev 2.1
Model: TI AM335x BeagleBone Black
DRAM:  512 MiB
WDT:   Started with servicing (60s timeout)
NAND:  0 MiB
Loading Environment from FAT... <ethaddr> not set. Validating first E-fuse MAC
Net:   eth2: ethernet@4a100000, eth3: usb_ether
Hit any key to stop autoboot:  0 
=> version
U-Boot 2020.10-rc3 (Sep 02 2020 - 12:24:07 -0500)

arm-linux-gnueabihf-gcc (Linaro GCC 6.5-2018.12) 6.5.0
GNU ld (Linaro_Binutils-2018.12)


Hi Robert,

I used picocom, essentially there is no difference with tera term. In windows, tera term seems straight. On Linux, picocom easier.

I am looking for am335x_uartspl_defconfig built. Having hard time to find one.


I’ve been grep’ing ti’s older u-boot branches, I’m starting to think that never existed…


Hi Robert,

I have a question related to the u-boot-spl.bin (MLO) and u-boot.img:

There is code to read/write EEPROM in the U-boot. But images are splitted into the above two images. So, EEPROM read/write is compiled into which of the above image. I had EEPROM written through the u-boot, but don’t know the writing is on which part.

Thank you,

So u-boot-spl.bin is loaded in SRAM, it initiates the base interfaces (usart/i2c/mmc/etc), reads the eeprom, initializes the rest and DDR. Then it “loads” u-boot.img from somewhere (usart/usb/mmc/etc…) and starts u-boot from DDR memory.

If you’d like to write the eeprom, do it in u-boot (u-boot.img)… (GND the test point…)

Blank eeprom:

i2c dev 0;
i2c mw 0x50 0x00.2 ff;
i2c mw 0x50 0x01.2 ff;
i2c mw 0x50 0x02.2 ff;
i2c mw 0x50 0x03.2 ff;
i2c mw 0x50 0x04.2 ff;
i2c mw 0x50 0x05.2 ff;
i2c mw 0x50 0x06.2 ff;
i2c mw 0x50 0x07.2 ff;
i2c mw 0x50 0x08.2 ff;
i2c mw 0x50 0x09.2 ff;
i2c mw 0x50 0x0a.2 ff;
i2c mw 0x50 0x0b.2 ff;
i2c mw 0x50 0x0c.2 ff;
i2c mw 0x50 0x0d.2 ff;
i2c mw 0x50 0x0e.2 ff;
i2c mw 0x50 0x0f.2 ff;
i2c mw 0x50 0x10.2 ff;
i2c mw 0x50 0x11.2 ff;
i2c mw 0x50 0x12.2 ff;
i2c mw 0x50 0x13.2 ff;
i2c mw 0x50 0x14.2 ff;
i2c mw 0x50 0x15.2 ff;
i2c mw 0x50 0x16.2 ff;
i2c mw 0x50 0x17.2 ff;
i2c mw 0x50 0x18.2 ff;
i2c mw 0x50 0x19.2 ff;
i2c mw 0x50 0x1a.2 ff;
i2c mw 0x50 0x1b.2 ff;
i2c mw 0x50 0x1c.2 ff;
i2c mw 0x50 0x1d.2 ff;
i2c mw 0x50 0x1e.2 ff;
i2c mw 0x50 0x1f.2 ff;

Write BBB Header

i2c dev 0;
i2c mw 0x50 0x00.2 aa;
i2c mw 0x50 0x01.2 55;
i2c mw 0x50 0x02.2 33;
i2c mw 0x50 0x03.2 ee;
i2c mw 0x50 0x04.2 41;
i2c mw 0x50 0x05.2 33;
i2c mw 0x50 0x06.2 33;
i2c mw 0x50 0x07.2 35;
i2c mw 0x50 0x08.2 42;
i2c mw 0x50 0x09.2 4e;
i2c mw 0x50 0x0a.2 4c;
i2c mw 0x50 0x0b.2 54;

Read to verify:

i2c dev 0; 
i2c md 0x50 0x00.2 20;


Thank you!

I already have u-boot to register EEPROM. It works with usb. I am wandering it doesn’t load u-boot.img (on our production boards) that is related EEPROM. The same sets of u-boot images, loads both files on BBBw.


With a blank EEPROM, you will get stuck in many places in u-boot.img:

and right here:

My usually workaround is attack it in board_detect.c:

Here’s the older patch:

Note, in my case i ‘invented’ a fake “A335BLNK” board, but you could just map it to “pocketbeagle” from board_detect.c too…


Hi Robert,

Although the u-boot-spl.bin and u-boot.img may not been built for uart boot mode, BUT
With BBBw dev board, when the first u-boot-spl.bin is loaded, it displays:
Trying to boot from UART

WIth our own production boards, when downloaded the same above u-boot-spl.bin, it doesn’t display “Trying to boot from UART…”, then the u-boot.img is stuck during download.

the above message is from the function
boot_from_devices ()

	loader = spl_ll_find_loader(spl_boot_list[i]);

if (loader)
printf(“Trying to boot from %s\n”, loader->name);
puts(“SPL: Unsupported Boot Device!\n”);
if (loader && !spl_load_image(spl_image, loader))
return 0;


I am wandering what causes this problem?

Thank You,

I think this is the lack of eeprom data, i’ve got an old BBB with a blank eeprom i test the flashing script. (it might be at the office…)


Hi Robert,

I rebuilt 2018-07 version of u-boot with am335x_evm_defconfig.
I expected to be able to download and run even without EEPROM is set, and break it bootloader shell. The purpose of that is helping hardware debugging usb0 and with some degree of board testing.
But the downloading of u-boot.img was stopped at 509 packets, 502192 bytes (77.7%) on BBBw ( I think BBBw has EEPROM set).

For our production board, it stops, too. (see screen dump):

Thank You for You Support,


Hi Robert,

I confirmed that the first stage has r/w EEPROM functions. Even it aborts, it will update EEPROM.

U-Boot SPL 2018.07-dirty (Aug 12 2020 - 13:46:14 -0400)
SPL: failed to boot from all boot devices

ERROR ### Please RESET the board

//======== EEPROM has been set (with my customized code).

I guess we have usb0 issue. But I cannot find any good version for BBBw to be loaded through uart and break into u-boot. The bootloader has many drivers built-in. It will be very helpful to use bootloader for board testing.

Thank you,