Ceramic caps in series

Recently discussed with a work colleague how to reach a minimum working voltage by placing ceramic caps in series.
The obvious advantage is being able to use readily available parts, at twice the desired capacitance.
What, though, are the disadvantages of such an approach. Would this be deemed poor design and if so what is the better method ?

Cheers,
Bob.

Hello Bob,

Putting several capacitors in series, the disadvantages would be reduced capacitance, more points of failure, voltage balancing issues, and board space.

It would be ideal to locate the appropriately sized capacitor for the application.

The balancing issue is non-trivial; a short due to over-voltage failure sheds that device’s burden onto those that remain, with a cascade failure being the foreseeable result. The nameplate tolerance on the cap value is the obvious contributor, but one also has to factor in the nasty loss of C under bias that many ceramics suffer from. On top of that, there are potential inter-device variations in leakage to account for.

Building an array from parallel elements naturally mitigates many of these issues and is usually the better option. Beyond that, there are operational territories where film caps are the better choice.

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Many thanks. I decided to replace the series option with a physically larger cap so as to satisfy the required uF whilst meeting Vpsu.