Digilent Arty A7 與 Xilinx Artix-7 一起執行 SiFive FE310 RISC-V

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介紹

本篇會逐步介紹利用 Digilent Arty A7（35T 和 100T）FPGA 評估套件在 Xilinx Artix-7 FPGA 上執行 SiFive 的 FE310 RISC-V。主題包括連接 JTAG、安裝 Vivado、建立 FE310 位元流、對板載配置記憶體進行程式設計以及運行範例 FE310 專案。

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硬體需求

相容基板

配件
DigiKey 的 Olimex ARM-USB-TINY-H 除錯器
DigiKey 的 Adafruit 跳線

Arty A7-35T Arty A7-100T
FPGA 部分 XC7A35TICSG324-1L XC7A100TCSG324-1
1 MSPS 晶片上 ADC Yes Yes
邏輯單元 33,280 101,440
邏輯分割 5,200 15,850
正反器 29,200 65,200
區塊 RAM (Kbits) 1,800 4,860
DSP 分割 90 240
時鐘管理模組 5 6
GTP 6.6Gb/s 收發器 4 8
I/O 引腳 250 300

供應商文件

Xilinx - Artix-7 FPGA: https://www.xilinx.com/products/silicon-devices/fpga/artix-7.html
Xilinx - Vivado Design Suite: https://www.xilinx.com/products/design-tools/vivado.html
Digilent - Arty A7：創客和業餘愛好者的 Artix7 FPGA 開發板：Artix-7 FPGA Development Board - Digilent Arty A7 - Xilinx

軟體設定

Arty Board JD 排針座

TDO TDI
nTRST TMS
TCK nRST
7 8
GND GND
VREF VREF

Olimex ARM-USB-TINY-H

VREF VREF
nTRST 4
TDI 6
TMS 8
TCK 10
11 12
TDO GND
nRST GND
17 18
19 20

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軟體

安裝 Vivado 2017.01

本專案需要 Vivado Design Suite 2017.01，下載 WebPACK 版本

/opt/Digilent/

sudo chmod +x Xilinx_Vivado_SDK_2017.1_0415_1_Lin64.bin
./Xilinx_Vivado_SDK_2017.1_0415_1_Lin64.bin
  • 選擇 Vivado HL WebPACK 選項：

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  • 確保選擇 7 系列（Artix-7）：

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  • 安裝到該專案的通用建置目錄：(/opt/Digilent/Xilinx)

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  • 概括

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為 Vivado 安裝 Digilent 系統板文件

下載包含 Vivado 系統板檔案的 Digilent 儲存庫。下載後，可以將它們複製到 Vivado board_files 目錄。

/opt/Digilent/

git clone https://github.com/Digilent/vivado-boards
cp -rv ./vivado-boards/new/board_files/* /opt/Digilent/Xilinx/Vivado/2017.1/data/boards/board_files/

安裝預先建置的 RISC-V 工具鏈

從以下位置下載 GNU 嵌入式工具鏈和 OpenOCD：RISC-V 板：SiFive 的 HiFive 板

/opt/Digilent/

wget -c https://static.dev.sifive.com/dev-tools/riscv64-unknown-elf-gcc-8.3.0-2019.08.0-x86_64-linux-ubuntu14.tar.gz
wget -c https://static.dev.sifive.com/dev-tools/riscv-openocd-0.10.0-2019.08.2-x86_64-linux-ubuntu14.tar.gz

提取 GNU 嵌入式工具鏈和 OpenOCD

/opt/Digilent/

tar xf riscv64-unknown-elf-gcc-8.3.0-2019.08.0-x86_64-linux-ubuntu14.tar.gz
tar xf riscv-openocd-0.10.0-2019.08.2-x86_64-linux-ubuntu14.tar.gz

仔細檢查 GCC 和 OpenOCD 是否在您的系統上運行

/opt/Digilent/riscv64-unknown-elf-gcc-8.3.0-2019.08.0-x86_64-linux-ubuntu14/bin/riscv64-unknown-elf-gcc --version

riscv64-unknown-elf-gcc (SiFive GCC 8.3.0-2019.08.0) 8.3.0
Copyright (C) 2018 Free Software Foundation, Inc.
This is free software; see the source for copying conditions.  There is NO
warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.

/opt/Digilent/riscv-openocd-0.10.0-2019.08.2-x86_64-linux-ubuntu14/bin/openocd --version

Open On-Chip Debugger 0.10.0+dev (SiFive OpenOCD 0.10.0-2019.08.2)
Licensed under GNU GPL v2
For bug reports:
    https://github.com/sifive/freedom-tools/issues

為 Olimex JTAG 安裝 udev 規則

Olimex udev 規則：

/etc/udev/rules.d/99-openocd.rules

SUBSYSTEM=="tty", ATTRS{idVendor}=="15ba",ATTRS{idProduct}=="002a", MODE="664", GROUP="plugdev"
SUBSYSTEM=="usb", ATTR{idVendor}=="15ba",ATTR{idProduct}=="002a", MODE="664", GROUP="plugdev"

安裝 Xilinx udev 規則

Xilinx udev 規則:

cd  /opt/Digilent/Xilinx/Vivado/2017.1/data/xicom/cable_drivers/lin64/install_script/install_drivers/
sudo ./install_drivers

仔細檢查權限：

ls -lha /dev/ttyUSB0
crw-rw-r--+ 1 root plugdev 188, 0 Feb  8 14:12 /dev/ttyUSB0

下載 SiFive Freedom 儲存庫

此儲存庫包含用於 Freedom E300 和 U500 平台的 SiFive RTL。

/opt/Digilent/

git clone https://github.com/sifive/freedom
cd freedom/
git checkout 943ab4ac2cefbbabdeda9447ec0f6231f6235f1e -b tmp
git submodule sync
git submodule update --recursive --init

為 Artix-7 35T 或 100T 構建

為專案的 Makefile 匯出 RISCV 和 VIVADO

/opt/Digilent/freedom/

export RISCV=/opt/Digilent/riscv64-unknown-elf-gcc-8.3.0-2019.08.0-x86_64-linux-ubuntu14
export PATH=/opt/Digilent/Xilinx/Vivado/2017.1/bin:$PATH

建立 Artix-7 35T

make BOARD=arty -f Makefile.e300artydevkit clean
make BOARD=arty -f Makefile.e300artydevkit verilog
make BOARD=arty -f Makefile.e300artydevkit mcs

建立 Artix-7 100T

make BOARD=arty_a7_100 -f Makefile.e300artydevkit clean
make BOARD=arty_a7_100 -f Makefile.e300artydevkit verilog
make BOARD=arty_a7_100 -f Makefile.e300artydevkit mcs

作為參考，此建置基於：

voodoo@hades:/opt/Digilent/freedom$ git show
commit 943ab4ac2cefbbabdeda9447ec0f6231f6235f1e (HEAD -> master, origin/master, origin/HEAD)
Merge: 5241f55 92ecc01
Author: Erik Danie <43764516+erikdanie@users.noreply.github.com>
Date:   Mon Dec 9 09:46:37 2019 -0800
 
    Merge pull request #146 from Tim453/e310_with_e31-core
     
    Changed the Configuration of the E300 Core

Vivado 將配置安裝到設備

連接 Olimex USB JTAG 和 ARTY 的 J10 USB 連接埠。（J10 也是 FE310上的預設串列埠）

  • 打開 Vivado 2017.1
  • 流程 → 開啟硬體管理器
  • 開啟目標→自動連接

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  • 在設備位置點擊右鍵 → 新增配置記憶體設備
35t 100t
製造商 Micron Spansion
密度 (Mb) 128 128
類型 spi spi
寬度 x1_x2_x4 x1_x2_x4
別名 n25q128-3.3v-spi-x1_x2_x4 s25fl127s-spi-x1_x2_x4

載入 *.mcs file: /opt/Digilent/freedom/builds/e300artydevkit/obj/E300ArtyDevKitFPGAChip.mcs

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Arty A7 的「PROG」按鈕可用於將設定檔重新載入到 Artix-7 上。

SiFive Freedom E SDK 範例

/opt/Digilent/

git clone https://github.com/sifive/freedom-e-sdk.git
cd freedom-e-sdk/
git checkout ee098cd5cca9efb93f88f58602f8a11e68e14621 -b tmp
git submodule sync
git submodule update --recursive --init

設定 RISCV_PATH 和 RISCV_OPENOCD_PATH

/opt/Digilent/freedom-e-sdk/

export RISCV_PATH=/opt/Digilent/riscv64-unknown-elf-gcc-8.3.0-2019.08.0-x86_64-linux-ubuntu14
export RISCV_OPENOCD_PATH=/opt/Digilent/riscv-openocd-0.10.0-2019.08.2-x86_64-linux-ubuntu14

作為參考，此建置基於：

voodoo@hades:/opt/Digilent/freedom-e-sdk$ git show
commit ee098cd5cca9efb93f88f58602f8a11e68e14621 (HEAD -> v201908-branch, origin/v201908-branch, origin/main, origin/HEAD)
Merge: 0fba42f 4f4bd3d
Author: Nathaniel Graff <nathaniel.graff@sifive.com>
Date:   Wed Nov 13 16:38:58 2019 -0800
 
    Merge pull request #413 from sifive/detect-medany-reloc-truncated-1908
     
    [v19.08] Detect "reloc truncated to fit" as medany incompatibility

範例「hello」

/opt/Digilent/freedom-e-sdk/

make BSP=metal PROGRAM=hello TARGET=freedom-e310-arty clean
make BSP=metal PROGRAM=hello TARGET=freedom-e310-arty software
make BSP=metal PROGRAM=hello TARGET=freedom-e310-arty upload

make BSP=metal PROGRAM=hello TARGET=freedom-e310-arty upload

voodoo@hades:/opt/Digilent/freedom-e-sdk$ make BSP=metal PROGRAM=hello TARGET=freedom-e310-arty upload
scripts/upload --elf /mnt/data/Digilent/freedom-e-sdk/software/hello/debug/hello.elf --openocd /opt/Digilent/riscv-openocd-0.10.0-2019.08.2-x86_64-linux-ubuntu14/bin/openocd --gdb /opt/Digilent/riscv64-unknown-elf-gcc-8.3.0-2019.08.0-x86_64-linux-ubuntu14/bin/riscv64-unknown-elf-gdb --openocd-config bsp/freedom-e310-arty/openocd.cfg
Open On-Chip Debugger 0.10.0+dev (SiFive OpenOCD 0.10.0-2019.08.2)
Licensed under GNU GPL v2
For bug reports:
    https://github.com/sifive/freedom-tools/issues
adapter speed: 10000 kHz
Info : auto-selecting first available session transport "jtag". To override use 'transport select <transport>'.
Info : ftdi: if you experience problems at higher adapter clocks, try the command "ftdi_tdo_sample_edge falling"
Info : clock speed 10000 kHz
Info : JTAG tap: riscv.cpu tap/device found: 0x20000913 (mfg: 0x489 (SiFive Inc), part: 0x0000, ver: 0x2)
Info : datacount=1 progbufsize=16
Info : Disabling abstract command reads from CSRs.
Info : Examined RISC-V core; found 1 harts
Info :  hart 0: XLEN=32, misa=0x40001105
Info : Listening on port 3333 for gdb connections
Info : Found flash device 'micron n25q128' (ID 0x0018ba20)
cleared protection for sectors 64 through 255 on flash bank 0
Ready for Remote Connections
Info : Listening on port 6666 for tcl connections
Info : Listening on port 4444 for telnet connections
Info : accepting 'gdb' connection on tcp/3333
0x20404692 in metal_shutdown (code=0) at /mnt/data/Digilent/freedom-e-sdk/freedom-metal/src/shutdown.c:19
19        __asm__ volatile ("nop");
Info : JTAG tap: riscv.cpu tap/device found: 0x20000913 (mfg: 0x489 (SiFive Inc), part: 0x0000, ver: 0x2)
JTAG tap: riscv.cpu tap/device found: 0x20000913 (mfg: 0x489 (SiFive Inc), part: 0x0000, ver: 0x2)
cleared protection for sectors 64 through 255 on flash bank 0
cleared protection for sectors 64 through 255 on flash bank 0
Info : JTAG tap: riscv.cpu tap/device found: 0x20000913 (mfg: 0x489 (SiFive Inc), part: 0x0000, ver: 0x2)
Loading section .init, size 0x194 lma 0x20400000
Loading section .text, size 0x4600 lma 0x20400200
Loading section .rodata, size 0x3c0 lma 0x20404800
Loading section .init_array, size 0x4 lma 0x20404bc0
Loading section .data, size 0x770 lma 0x20404bc8
Info : Padding image section 0 at 0x20400194 with 108 bytes
Info : Padding image section 1 at 0x20404bc4 with 4 bytes
Info : Disabling abstract command writes to CSRs.
Info : JTAG tap: riscv.cpu tap/device found: 0x20000913 (mfg: 0x489 (SiFive Inc), part: 0x0000, ver: 0x2)
Start address 0x20400000, load size 21192
Transfer rate: 27 KB/sec, 3532 bytes/write.
shutdown command invoked
shutdown command invoked
A debugging session is active.
 
    Inferior 1 [Remote target] will be detached.
 
Quit anyway? (y or n) [answered Y; input not from terminal]
Remote connection closed

voodoo@hades:/opt/Digilent/freedom-e-sdk$ tio /dev/ttyUSB2 -b 57600
[tio 10:56:24] tio v1.32
[tio 10:56:24] Press ctrl-t q to quit
[tio 10:56:24] Connected
Hello, World!
Hello, World!

評論

任何問題或意見，歡迎以下留言。