Hello everyone,
I am studying as a graduate student in electrical and electronics engineering. For my thesis, with FPGA, I am going to process an input which is 240Mhz or 1.3GHz RF sine wave (the frequency could be lowered a bit but not much). After a user defined delay, I am going to generate an output digital signal which has the same period and frequency such as the input had.
I am quite new at this area, I need your advices on FPGA selection, ADC selection and the other needs for this study. I am planning to use VHDL, so any technical advise on communication protocols would be great for me as well! Cost efficient way would be prefered ofc 
Thanks in advance!
Kind regards,
Güneş
gseem.94
Thank you for contacting DigiKey , I am not that versed with FPGA and what you are trying to do , hoping one of our engineers can get the answers for you on here .
Thanks Craig
To capture a 1.3 GHz RF sine wave input without aliasing, you must sample at least twice its frequency.
According to the Nyquist theorem, that means a minimum sampling rate of:
2 × 1.3 GHz = 2.6 GSa/s
So as Analog to Digital Converter selection criteria using a Sampling Rate (Per Second) of 3G we could recommend this:
ADC07D1520CIYB/NOPB as IC ADC 7bit 2 Inputs and 2 Folding Interpolating in a 128-HLQFP (20x20) from Texas Instruments
Both main players for FPGAs: Xilinx (now AMD using Vivado or ISE) and Intel (former ALTERA using Quartus) provide robust VHDL support.
Maybe other suppliers can offer a more cost efficient way …. have a look at these development and EVAL boards:
XYLONI as TRION T8 F81 EVAL BRD from Efinix, Inc. or
ICE40HX8K-B-EVN as ICE40-HX8K BREAKOUT BOARD from Lattice Semiconductor Corporation or
AGLN-NANO-KIT as KIT HARDWARE FOR AGLN-NANO from Microchip Technology (Ex-Microsemi)
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