Created by Tony Storey, last modified on Jan 20, 2014
Features
The following simple audio development for Kinetis ARM Cortex M4F topics are covered.
- Overview of the Kinetis K60F120M tower module and K60 ARM Cortex M4F MCU
- I2S, ADC and I2C usage to interface and control the Freescale SGTL5000 Audio Codec
- GPIO for use as a relative audio level meter
- Overview of the SGTL5000 tower module
- An example library for SGTL5000 configuration and basic functionality
- Enhanced audio using the Digital Audio Processor (DAP) and custom library functions
Introduction
This reference design utilizes the Freescale TWR-K60F120M and TWR-AUDIO-SGTL development boards together with the tower system to enable simple audio development. See figure 1 and 2 below.
Figure 1 – Tower Kit Modules for K60F120M and SGTL5000
Figure 2 – Assembled Tower Kit with ULINK2 Debugger
Background
Many reference designs are developed with input from an Isochronous USB audio stream in mind. This requires a USB stack (Audio Device Class) and often adds the complexity of DMA transactions and FIFO usage to synchronize the input USB samples with the output DAC samples. These are unsynchronized by nature so there is some overhead involved in making sure the input FIFO buffers don’t under/overrun. The simple audio example used here uses the SGTL5000 audio codec for input and output, so there are no synchronization issues. Several I2S signals differ from the K60N512 board, so the jumper setting changes, in italics, below in table 1 will need to be made when using the K60F120M tower module. The port changes can also be found in the included I2S.C file.
Table 1
TWR Board Jumper Connections for Design
| Jumper | Option | Setting | Description |
|---|---|---|---|
| J1 | USB VREGIN Power Connection | ON | Connect USB0_VBUS from Primary Elevator (A57) to VREGIN |
| J2 | Infrared Transmitter Connection | OFF | Disconnect PTD7/CMT_IRO/UART0_TX from IR Transmitter (D1) |
| J6 | 50 MHz oscillator output enable | OFF | On-board 50MHz oscillator enabled. On-board 50 MHz clock drives main EXTAL |
| J8 | MCU Power Connection | ON | Connect on-board 3.3V supply to MCU |
| J9 | VBAT Power Selection | 1-2 | Connect VBAT to on-board 3.3V supply |
| J10 | OSJTAG Mode Selection | OFF | Debugger Mode |
| J12 | JTAG Power Connection | OFF | Disconnect on-board 5V supply from JTAG port |
| J16 | Infrared Receiver Connection | OFF | Disconnect PTC6/CMP0_IN0 to IR Receiver |
| J18 | 50 MHz oscillator power | ON | Power supply to 50MHz oscillator enabled. |
| J19 | Potentiometer Connection | ON | Connect ADC1_DM1 to the potentiometer |
| J21 | I2S0_TXD0 source | 2-3 | PTC1 is used as I2S0_TXD0 (NFC cannot be used when this option is selected) |
| J22 | I2S0_TX_FS source | 2-3 | PTC0 is used as I2S0_RX_BCLK/I2S0_TXD1 (NFC cannot be used when this option is selected) |
| J23 | I2S0_RX_BCLK/I2S0_TXD1 source | 2-3 | PTC0 is used as I2S0_RX_BCLK/I2S0_TXD1 (NFC cannot be used when this option is selected) |
| J24 | I2S0_RX_FS/I2S0_RXD1 source | Not used | |
The Software and Hardware required/used for this design:
Application
This example uses one I2S channel from the K60 Cortex M4F to interface with the SGTL5000 audio codec. The codec is setup as the master, so it determines the sample-rate. The audio loop is executed once data is received form the I2S receiver FIFO. The last thing the loop does before waiting for data again is send the output data through to the transmit FIFO. This design was developed for both SSI and SAI versions of the K60 silicon. The general configuration for the SAI/I2S0 module can be seen below in figure 3.
Figure 3 – SAI/I2S0 Configuration
The K60’s onboard ADC is used to sample a voltage from the board’s potentiometer. There are two functions to return the 16-bit ADC sample. The returned sample function can be selected as either a blocking function or interrupt based IRQ handler from the ADC header file, the default is interrupt based. Blocking is generally avoided in an audio loop because it wastes processor cycles. Once the ADC value is returned it is converted to a float and normalized to a value between 0 and 1.0. It is used to control the output volume. The ADC requires a configuration and calibration, both of which can be found in figures 4 and 5 respectively. Figure 6 below is the interrupt handler for returning the conversion.
Figure 4 – ADC1 Configuration
Figure 5 – ADC1 Calibration Function
Figure 6 – ADC1 Interrupt Handler
The K60’s uses I2C as a master to initialize and configure the codec. Most of the device’s register addresses have been defined in a home-rolled library with functions for an I2C write, initialization, bypass, mute, DAC volume control, Bass/Tone enhancement, Stereo widening/DAP surround control, Headphone Volume, Line Out Volume, DAP master channel volume, and ADC volume control. The I2C write function uses 16 bit register addressing and word writes to match the requirements of the SGTL5000. Using these functions to modulate the audio will save cycles, processor overhead, and reduce code size; more functionality can easily be added by the user. The I2C configuration can be found below in figure 7.
Figure 7 – I2C0 Configuration
The function used to write control words to various registers within the SGTL5000 can be found below in figure 8.
Figure 8 – Function to Write Control Words to Various Registers of the SGTL5000
The General Purpose IO was configured for LED outputs and user inputs for the board’s tactile switches. The LED’s are used as a relative output volume meter. The input audio stream is averaged over 128 samples to implement a low pass filter and reduce the amount of time the LEDs are switched. SW2 on the K60F120M tower module is used to add surround and bass enhancement through use of the SGTL5000 DAP. The inline configuration for the LED outputs, LED switching functions and GPIO input configuration can be found in figure 9 below.
Figure 9 – Configuration for the LED Outputs, LED Switching and GPIO Input
The SGTL5000 Stereo Audio Codec is a low power 2 channel ADC and DAC with headphone and line outputs for left and right channels. It can be configured and controlled via an application processor/MCU SPI or I2C interface. This design uses one of the K60F’s I2C channels to configure the device. The SGTL5000 is set up as a slave I2C device and a master I2S device. The K60F sets up the device sample rate and bit depth. This example uses 24 bit word width and a 48 KHz sample rate. The codec also employs a Digital Audio Processor (DAP) to provide some pre-engineered DSP algorithms such as stereo widening and tone control. The device’s volume can be controlled from several sources, ADC, DAC, DAP, Line Out; several library functions were written to allow this communication. The library functions can be found in the SGTL5000.h file in figure 10 below.
Figure 10 – Library Functions for SGTL5000 Control and Configuration
The SGTL5000 register addresses have been defined in the header for ease of use. See figure 11 below.
Figure 11 – Register Defines for SGTL5000
Design Software
Keil MDK-ARM v4 was used to develop this project. MDK-ARM is a software suite for development of Cortex –M, Cortex –R4, ARM7 and ARM9 microcontrollers/processors. MDK-ARM has advanced debug capabilities, such as Serial Wire Debug and Serial Wire Viewer, through the use of a ULINK2, ULINK-ME, ULINKpro as well as other third-party hardware debuggers. Using the ULINKpro the Logic Analyzer within uVision4 can be used to view signals and variables as they change in real-time. This can be seen in figure 12 below.
Figure 12 – Logic Analyzer Graphically Displaying Left Channel Audio
Conclusion
This design demonstrates the use of the Freescale TWR-K60F120M Tower development kit and TWR-AUDIO-SGTL for simple audio development. The audio processing loop remains small due to the fact that it is synchronized by the master I2S device driven by the audio sample rate (SGTL5000). Large FIFO buffers are not needed to synchronize input to output samples such as in a USB audio streamed system. This works well in a system where the input and output sample rates are matched as in this case where the rates are determined by the codec.
Additional Information
Further design support, tools, product tutorials, application notes, user’s guides and other documentation can be found on the Freescale website at NXP® Semiconductors Official Site | NXP Semiconductors and the Keil website at http://www.keil.com/.
Appendix:
Project File:
Talkthrough_I2S_Nov_17.zip (2.8 MB)
Comments/Questions
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