How to enable GPMC bus on BBB with recent kernel

Hi, I would love to enable GPMC configuration of beaglebone black. I downloded the last TI kernel 5.10 but I did not found the dtbo to enable GPMC in dtbo archive. Where can I found a valid dtbo to enable GPMC on kernel 5.10? I also looked on older kernel version but it seems GPMC dtbo is never available.
Thanks

There is a good example in mainline, are you doing something other then memory?

https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm/boot/dts/ti/omap/am335x-nano.dts?h=v6.10-rc6#n254

https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/memory-controllers/ti,gpmc.yaml?h=v6.10-rc6

and

https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/memory-controllers/ti,gpmc-child.yaml?h=v6.10-rc6
Regards,

Thanks for the links, I’ll look them.

I’m using GPMC to communicate to an FPGA. With old kernel 4.1.10-bone16 I used a dts (I attached it at the end of this message) and everything was ok. Now after ten years I have to upgrade the kernel because I have to support new devices and the driver’s device is not compatible with 4.1.0 but the old dts to enable GPMC doesn’t work.

Here the old dts:

/dts-v1/;

/ {
        compatible = "ti,beaglebone", "ti,beaglebone-black";
        part-number = "BONE-GPMC";
        version = "00A0";

        fragment@0 {
                target = <0xdeadbeef>;

                __overlay__ {

                        pinmux_mynet_cape_00a0_pins {
                                pinctrl-single,pins = <0x0 0x20 0x4 0x20 0x8 0x20 0xc 0x20 0x10 0x20 0x14 0x20 0x18 0x20 0x1c 0x20 0x20 0x20 0x24 0x20 0x28 0x20 0x2c 0x20 0x30 0x20 0x34 0x20 0x38 0x20 0x3c 0x20 0x7c 0x10 0x94 0x
0 0x98 0x0 0x80 0x21 0x48 0x2f>;
                                linux,phandle = <0x1>;
                                phandle = <0x1>;
                        };
                };
        };

        fragment@1 {
                target = <0xdeadbeef>;
                depth = <0x1>;
                #address-cells = <0x1>;
                #size-cells = <0x1>;

                __overlay__ {
                        status = "okay";
                        #address-cells = <0x2>;
                        #size-cells = <0x1>;
                        pinctrl-names = "default";
                        pinctrl-0 = <0x1>;
                        ranges = <0x1 0x0 0x1000000 0x1000000>;
                };
        };

        __symbols__ {
                mynet_cape_00a0_pins = "/fragment@0/__overlay__/pinmux_mynet_cape_00a0_pins";
        };

        __local_fixups__ {

                fragment@1 {

                        __overlay__ {
                                pinctrl-0 = <0x0>;
                        };
                };
        };

        __fixups__ {
                am33xx_pinmux = "/fragment@0:target:0";
                gpmc = "/fragment@1:target:0";
        };
};

I love compiled overlay that have been de-compiled… Your example overlay source only touches the GPIO pinmux.

So let’s start with a quick example, you need the pinmux section and one for the gpmc bus:

So let’s just look at BB-W1-P9.12-00A0.dts here: https://openbeagle.org/beagleboard/BeagleBoard-DeviceTrees/-/blob/v5.10.x-ti-unified/src/arm/overlays/BB-W1-P9.12-00A0.dts?ref_type=heads

So you’ll need:

&am33xx_pinmux {
	mynet_cape_00a0_pins: pinmux_mynet_cape_00a0_pins {
		pinctrl-single,pins = <
			0x0 0x20
			0x4 0x20
			0x8 0x20
			0xc 0x20
			0x10 0x20
			0x14 0x20
			0x18 0x20
			0x1c 0x20
			0x20 0x20
			0x24 0x20
			0x28 0x20
			0x2c 0x20
			0x30 0x20
			0x34 0x20
			0x38 0x20
			0x3c 0x20
			0x7c 0x10
			0x94 0x0
			0x98 0x0
			0x80 0x21
			0x48 0x2f
		>;
	};
};

Then fill in the rest: am335x-nano.dts « omap « ti « dts « boot « arm « arch - kernel/git/torvalds/linux.git - Linux kernel source tree

&gpmc {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&mynet_cape_00a0_pins>;
};

Regards,

It seems to work, now I don’t have errors loading the devicetree so I can try to communicate with my FPGA.

Thanks for you support.