Gigaspeed Isolation PCIe (Peripheral Component Interconnect express) Solutions from ADI
The ADN4622BRNZ isolator is a key enabler for PCIe Generation 1 to isolate the two LVDS (Low Voltage Digital Signal) pairs; however, it is important to know how to get it to work in harmony with the PCIe Gen 1 signals.
The PCIe signal composition must be considered to ensure that the protocol’s key behaviors are fully supported. The Level shift is needed to support the signal’s transition through the ADN4622BRNZ and electrical idle support ensures the idle state is propagated. This is captured with the coupling network blocks at each input and output of the ADN4622BRNZ, as shown in Figure 1.
In addition to the coupling network, MAX14954 PCIe ReDriver employs equalization and improves signal integrity.
A 100 MHz Reference Clock (REFCLK) signal is used for synchronization and is a prerequisite to begin data transmission. The ADN4620BRSZ-RL can easily isolate this signal.
The system management bus, a two-wire signal operating on the principles of I²C, provides information to and from the system’s devices. The ADuM1252AUA+T I²C device can isolate these signals.
High-to-low or low-to-high signals must be propagated accurately to ensure correct PCIe protocol support. These include WAKE and CLKREQ for the propagation of a low Power State and PERST is used to reset the link, which is required for proper operation. It is important to signal the link initialization from the endpoint to the root complex and vice versa. PRNST indicates that a card is present and inserted correctly on both ends, where all power supply and signal pins are connected. This avoids powering up a card inserted incorrectly, which may cause damage.
These signals are addressed using the ADUM3211ARZ-RL7 or ADuM341E0BRWZ-RL general-purpose digital isolators iCoupler® series.
Figure 1: Isolation of PCIe Gen 1 interface utilizing ADI’s isolation technology
The isolated power solution, which ensures full isolation across the barrier (the LT8302ES8E#TRPBF can easily support this function), is not captured in Figure 1.
Conclusion
This blog considered how to isolate the PCIe Gen1 protocol in an industrial setting. It could also be applied to any other end application that requires isolation for requirements such as robustness, noise and protection. This can be easily scaled for higher lane widths by replicating the Gigaspeed section of Figure 1.