Need Kernel and FSBL drivers for MT40A512M16LY-075:E

Semiconductor Integrated Circuits (ICs)
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Can anyone please provide Kernel and FSBL(First Stage Boot loader) drivers for the MT40A512M16LY-075:E

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Hello,
Welcome again. All I have to offer is this Micron link. I’m sure others will post with more information if this doesn’t provide what you need.

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Hi @muvva.navinkrishna looking at your previous posts, are you a ‘bot’ or a ‘human’ ? You ask a lot of similar questions, but don’t seem to follow up…

MT40A512M16LY-075:E is memory… What SoC is connected to this Memory IC? Depending on that answer, there will be more questions, but at-least we can point you to a manufacture’s potential timing tool.

Please respond with a response so we can assist you.

Regards,

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Hello @RobertCNelson ,

Apologies for the delay. Navinkrishna is my team member. We are trying to bring up petalinux on a custom board with AMD ZU+ MPSoC XCZU1CG and MT40A512M16LY-075:E DDR. We need to enable support for this DDR in zynq First Stage Boot Loader, U-Boot and kernel. It would be really helpful if you could provide some details regarding this.

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Hi @RobertCNelson Sorry for the delay and coming to the MPSOC we are using is Zynq
UltraScale + MPSoC XCZU1CG-1SBVA484I and we are using/enabling for the Arm Cortex A53(Processing System). If you need any more please contact us and @muhammad.shameen is also my team member.

We are trying to bring up petalinux on a custom board with AMD ZU+ MPSoC XCZU1CG and MT40A512M16LY-075:E DDR. We need to enable support for this DDR in zynq First Stage Boot Loader, U-Boot and kernel. It would be really helpful if you could provide some details regarding this.

Thanks & Regards
Muvva Navin Krishna

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You need to use Xilinx’s tool to configure the DDR for your application: AMD Adaptive Computing Documentation Portal

Regards,

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Thanks for your response. We will look into it.