RE: FLIR Lepton v2 breakout Board/BBB

Embedded Linux Discussions
42

Oh and Sir,

I know nothing about MISO/MOSI on the BBG. So, I am reading now. I finally understand that things are a bit more complicated than just naming labels now.

…

So, I am off to read the overlay that I am using for SPI0, still going to give you the spidev_test program output, and plug in!

Seth

43

Hello Sir,

Forget what I typed earlier. I made a mistake (again). Sorry.

…

Quadruple checking the input pins for SPI0 for MISO and MOSI and then checking the overlay.

Seth

P.S. Sheesh.

/* the pin header uses */
                "P9.17",        /* P9_17 (A16) spi0_cs0.spi0_cs0 */
                "P9.18",        /* P9_18 (B16) spi0_d1.spi0_d1 */
                "P9.21",        /* P9_21 (B17) spi0_d0.spi0_d0 */
                "P9.22",        /* P9_22 (A17) spi0_sclk.spi0_sclk */
                /* the hardware ip uses */
                "spi0";

I understand this idea. But, the script does not work on my board for some reason. I am receiving the exact same thing as 13 hours ago.

Oh and here. Finally: I found on the source that it is for SPI1 and not SPI0.

spi mode: 0
bits per word: 8
max speed: 500000 Hz (500 KHz)

FF FF FF FF FF FF
40 00 00 00 00 95
FF FF FF FF FF FF
FF FF FF FF FF FF
FF FF FF FF FF FF
DE AD BE EF BA AD
F0 0D
44

3024×4032 3.17 MB

Sir @RobertCNelson ,

You did it, man! You helped me blind. Anyway, I know I am a pain at times. Thank you!

Seth

P.S. That is my hand in thermal…