ZYNQ Board external clock direct to FPGA

Welcome back @markatmerlintps,

Understood, you have a PNT application that requires a rock-solid PPS (likely GPS derived).

Thoughts:

  1. What is the logic level of your PPS? As memory serves, the ZYNQ has 3.3. VDC logic. You may or may not need a level shifter. Be sure to carefully review the data sheet for PPS and the ZYNQ board.

  2. Recommend use of a synchronizer. This will delay you PPS, but by a known ammount.

  3. Depending on you timing requirements, the PPS may not be good enough as you will have jitter equal to the clock period of the FPGA. Please consider this article.

Sincerely,

Aaron

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