I am new to PCB development and I was hoping you great people could help me explain how to interface my ADC (http://www.ti.com/lit/ds/symlink/ads7952.pdf) and my crystal (NX3225SA), and explain theory along the way. Some industry rule of thumbs would be great as well.
Here is what I know, the loaded capacitance (don’t know why a crystal needs to be capacitively loaded) is 8pF, assuming 5pF stray capacitance, then the paralled cap’s equal 3pF. Using the 2X rule of thumb this would give 6pF caps. Does this sound reasonable? If it doesn’t, why?
Looking at a snapshot of my schematic (https://i.imgur.com/Af6mPKd.png) would these caps be placed on both I/O pins tied to ground?
Hopefully I have provided enough information.