Hi there, I was reading the application notes titled “Implementing Digital Lock-In Amplifiers Using the dsPIC DSC” written by Darren Wenn. I would like to replicate what he did but before I do that, may I know what is the smallest signal amplitude this version of the digital lock-in amplifier can reliably detect? Is it in the millivolt (mV), microvolt (µV), or nanovolt (nV) range?
Hello @Dion,
This is a fun application described in this Microchip ap note:
The technique is related to communication techniques where a small input signal is multiplied (mixing) against a known reference signal. The application note shows the same reference signal used as an excitation voltage for the DUT (Wheatstone bridge in this example).
In many ways the system acts like the Intermediate Frequency (IF) in a superheterodyne receiver with a series of filters “tuned” to a frequency 2X the reference.
As for noise, I believe we are still bound by the performance of the ADC and amplifier. The signal of interest must be above the digitization noise. For example, if the amplifier, ADC, and associated voltage reference associate a single bit change as 100 uV, we should anticipate a practical limitation in the 1 mV region. A device with long integration times may perform better than this 10-times-LSB estimate. However, this should serve as a reasonable starting point to set expectations.
Kindly keep us informed about your project.
Best wishes,
APDahlen