Some time ago, Infineon introduced a new package type for its OptoMOS 5 series Power transistors -
TO-Leaded Topside-Cooled (TOLT), optimized for superior thermal performance.
The concept of the new topside-cooled TOLT package is that the leadframe inside the package is flipped, and the drain pad (bottom side of the chip = drain connection) is exposed to the top of the package
Topside-Cooled package:
Bottom-Cooled package:
So why according to the data sheet of these topside-cooled FET’s, they still should have a thermal copper pad on PCB?
Official manufacturer answer is as following:
This TOLT package provides the excellent thermal performance by minimizing the thermal resistance to heatsink.
The 7mm x 10.2mm exposed copper rectangle below the FET provides additional dissipation from the bottom side as well. This pad has no connections with the Drain/Source terminals of the FET.
As a result, both top and bottom side cooling is feasible using the given package and footprint.
More information about Topside-Cooled (TOLT) package can be found in below links:
OptiMOS™ power MOSFETs in TOLx family
TOLT Appl Note
TOLT Design Guideline
Recommendations for Board Assembly of Infineon Packages with Dual Row Gullwing Leads
TOLT Eval board UM