Making Sub-Circuits / Hierarchical Circuits in LTSpice

As mentioned before, this will be a series of posts for tips using LTSpice. This post will be covering the basics of making usable sub-circuits and hierarchical blocks based on existing library components. I will be putting together an idealized version of an Op-Amp from Analog Devices called the OP275GPZ (Digi-Key part number OP275GPZ-ND) which is an Audio Amplifier that I am using in a design. The actual device has more specific data values, so this version will not be to the same specifications.

Creating the First Sub-Circuit/Block

Start with a new schematic for the baseline circuitry.

  1. From the first post, click the AND gate symbol for the component library and search for “Univ”.
    I had a lot of headaches when I first tried to make this part before because some of the basic op-amps in the library have unusable models when making a valid Spice library component (this will be covered soon). It is better to use the UnversalOpamp2 device as the model has a good pre-installed sub-circuit. Place one of these into the circuit and mirror the other by pressing Control + E on the keyboard and place the other in close proximity to the first.
  2. Wire the circuit in a similar fashion to the picture below.

    Like the last circuit, the wires can be sent in any direction to make the circuit custom to what is preferred. The only note is that distinct, unconnected wires must not connect to anything yet. Terminate a wire anywhere by clicking on the desired grid location then pressing escape on the keyboard. These will serve as the outputs and inputs labeled for use in an upper-level circuit. Each node has to have a unique name that is easy enough to remember, I will be going off the data sheet for the OP275 starting with “OUTA”.
  3. Use the Label Net tool to place names for the output/input nodes that are unconnected.
    A. Click the Label Net tool or press F4.
    When the dialogue box opens, there are two global pin names GND and COM. Underneath that is where the custom names for the pins need to be typed. It is also important to pick the type of port, in this case, OUTA is an output. Unsure if something is an input or output? Bi-directional might be a good option to pick.
    B. Place the label nets on the appropriate wire ends/outputs.

    When “OK” is clicked, place the clear blue rectangle on the output of U1 or on the end of the wire for the output of U1 as this is the equivalent of OUTA. Typically, I create the nodes in the order that the datasheet lists for pins 1-n where n = 8 for the part number, n can be any integer based on the number of pins the custom part has. The order does not strictly need to be followed when placing pins, but the Netlist order will matter later on for sub-circuits only. It might be faster from this point to use Control + C to copy the node output, place the copied label on all the open connections, and then edit each one to have a unique name. Here is what mine will look like when finished, make sure to edit the pin type for the Voltage Inputs and Op-Amp inputs to “Inputs” in the Label Net editor.

    At any point in developing the circuit, I’d recommend “Saving As” a unique name. I called it OPZ which will be used later.

    There are two methods for creating schematics that can be used in other schematics: Sub-Circuits and Hierarchical circuits. I will separate them below:
Specific Setup for the Library Netlist Sub-Circuit Method

C. Copy the Netlist for this circuit and make a few edits in a basic text editor or Notepad++ to make this a valid sub-circuit.
   b. Click the View menu and chose the “SPICE Netlist” option, copy all the text in the next window, paste into a new blank text using Notepad or Notepad++.

   c. Make sure that all the edits are made in the code block below, you can copy-paste from here and replace everything below the “C:” line, which will look different on your end.

//do not copy this line, remember OPZ8DIP may have a different name for you and you can name the inputs on your diagram whatever you want
XU1 +INA -INA V+ V- OUTA level.2 Avol=1Meg GBW=10Meg Slew=10Meg ilimit=25m rail=0 Vos=0 phimargin=45 en=0 enk=0 in=0 ink=0 Rin=500Meg
XU2 +INB -INB V+ V- OUTB level.2 Avol=1Meg GBW=10Meg Slew=10Meg ilimit=25m rail=0 Vos=0 phimargin=45 en=0 enk=0 in=0 ink=0 Rin=500Meg
.lib UniversalOpamps2.sub
.ends OPZ8DIP

The second and second to last line is really important. The .subckt SPICE command makes a new sub-circuit called OPZ8DIP with the ordered pins named OUTA, -INA, +INA, V+, +INB, -INB, OUTB, and V+. The order of the pins absolutely matters in this case and must be remembered. Technically, the pin names can be re-ordered, but they will become different netlist numbers. If the wrong netlist number is referenced, when making a symbol, there will be unexpected results in analysis or it may fail to work. The netlist order begins at 1 starting after the name of the sub-circuit and ends with the last pin name. The pin names must be named the same as the names given to the nodes. Each pin name is separated by a space in the SPICE file. The .ends command ends the sub-circuit called OPZ8DIP.
   d. Save this new file as any name with an extension of either .lib or .sub, this doesn’t have to be the same name of the sub-circuit, but I typically do that to make it easier.

  1. Create a new symbol to represent the sub-circuit/hierarchy-block.
    A. Click the Hierarchy menu at the top and choose either open this sheet’s symbol or create a new symbol.
    I prefer the Create a New Symbol option because there is an extra dialogue box asking to automatically generate a drawing. The automatic drawing often doesn’t look very good and the pin order is often completely incorrect. There are some differences in the steps for Hierarchical and Sub-Circuits, so I will use specific directions for Sub-Circuits and call out the differences in the section below the Sub-Circuit section.

Setting up Attributes for Sub-Circuits

  1. Place the pins in the same order as the .lib file with the same names. The symbol drawing mode has shortcuts for drawing certain items.
    Pressing “P” on the keyboard brings up the pins and always begins at Netlist Order 1, this is why it is important to remember the order of the pins in the .lib file. Keep adding the pins in the same order laid out similarly to the datasheet mentioned earlier. The justification will depend on the side that the pin is placed on. OUTA through V- will be Left justified while the other pins are Right justified. This is completely custom, so design it in whatever way desired. I drew the pins this way to avoid clashing with text and wires.

    Draw an outer rectangle that intersects with the middle of the pins by pressing “R” on the keyboard. This is a corner to corner rectangle. The drawing in this grid is very sensitive to mouse movement and provides a crosshair. If the crosshairs are a little off from the grid dots, it will be drawn that way.
  2. Save the symbol as the same name of the circuit schematic.
    This is the same as Save As for the circuit schematic, except the file type is different, which is .asy.
       a. Press Control + A to bring up the symbol attributes.
       b. Edit Prefix value to “X” and Value to the same name given to the sub-circuit mentioned in the setup for the Netlist Library method. Make sure the symbol type is Cell before clicking “OK”.
       c. Save the symbol once more.

Hierarchical Blocks

The main difference between Hierarchical Blocks and Sub-Circuits is Hierarchy is schematically based while the Sub-Circuit is SPICE library netlist based (I found this good explanation here). I will use the same steps listed on this page as this was my resource explaining the difference. The netlist order does not matter in this situation, but the pin names have to match and the circuit has to have the same name as the symbol like the Sub-Circuit. The circuit stays the same and so does the symbol drawing. The changes are adding an instance name to the symbol by clicking Control + W on the keyboard to add InstName (this can be done for the other process too) and the attribute editor is left completely blank and changed to Symbol Type: Block. Remember, Control + A on the keyboard brings up the Attribute editor.
NOTE: Sometimes LTSpice will not be able to find the Hierarchical part if you try to use the part in a circuit that is in a separate folder. Move your schematic for testing into the same folder that your Hierarchy parts are in to fix the issue if this error comes up:

Using the Newly Created Sub-Circuit/Block

Create a new circuit schematic to start with and then click the AND Symbol for a new component. Remember, if the folder created before is already linked then finding the new part is easy.

  1. Click the AND symbol again for a new component and switch the Top Directory to the appropriate location.
    NOTE: If this is the first time using LTSpice, two test folders may show up. LTSpice typically uses the first folder used for saving as a secondary directory for searching. The new part should show up here. If the steps for making a .lib file were followed, it will be yellow in color and will require further instructions to make it function correctly. If this is a Hierarchy Block, the default folder should link the symbol with the circuit if they have the same names and will not require a special SPICE command added to the circuit schematic. If you search for the part in the folder it should look like this for a Hierarchy block:
    If the part is right-clicked after placing it the Schematic Block editor opens.

The pictures below represent a Cell part that requires the library SPICE file along with its editor when right-clicked.

2. If this is a .lib version part, running the circuit will not work without adding the following SPICE directive.
A. Click .op at the end of the tool-bar.
B. Type .lib in the text editor and click “OK”.
C. Place the directive somewhere on the schematic and right-click to edit it after.
D. Click “Browse” and find the path for the .lib file made earlier then press “OK”.

The reason this needs to be added is that the program doesn’t know where to find the netlist for the sub-circuit even though the folder is linked already. Try running the schematic without this added command there will be this error:
Here is an example circuit I made using this sub-component (.lib version):

The left side is an inverting amplifier while the right side is a non-inverting amplifier. The best way to see how different these modes are for Op-Amps, I used a DC sweep on V1 and a DC Sweep on V2. Here is the sweep on V1 from 0 to 5 volts:
Here is the sweep on V2 from 0 to 5 volts:
Both reach their max amplification at about 500mV, but the inverting amplifier travels in the opposite direction of the non-inverting amplifier. The input voltage is increasing to 5, but the cut-off reduces the speed at which the output voltage increases due to the Op-Amp’s maximums and the power voltage supply.