Power Loss calculations Part 1: An Approach to Estimate Switching Time Intervals in Power MOSFETs

Semiconductor Discrete Semiconductor Products
, ,
1

Application Note: Guide for power losses calculation in MOSFET – Part 1

Subtitle: Approach to estimate switching time intervals in Power MOSFET

1. Introduction

Design engineers face a growing challenge in optimizing power efficiency in modern electronic systems, especially as applications demand faster switching speeds and higher performance. Whether in automotive control units, industrial motor drives, or consumer electronics, excessive power dissipation during switching events can lead to increased thermal stress, reduced reliability, and higher energy costs.

One of the most critical contributors to power loss in these systems is switching loss in MOSFETs. This becomes particularly significant in circuits involving inductive loads. Despite the widespread use of MOSFETs for their fast-switching capabilities and ease of control, accurately estimating and comparing switching losses across different components remains a complex task.

Focus here is on calculating switching times, which are essential for understanding dynamic power dissipation. MCC offers a range of Power MOSFETs optimized for switching applications (see Table 1). One of these parts will be used as a reference in the calculation and simulation examples presented in the following sections of this series.

Table 1: MCC Power MOSFET Line-Up for Switching Applications

image
image1516×372 55.1 KB

2. The Power MOSFET

The Power MOSFET is a voltage-controlled unipolar device that requires only a small amount of input (Gate, G) current (non-latching) to operate. The MOSFET will continue to allow current to flow between Drain (D) and Source (S) if the required amount of Gate (G) to Source (S) voltage, VGS, is maintained, as seen in Figure-2.

image
image305×313 5.86 KB

Figure-1. Power MOSFET terminal diagram

Since only majority carriers contribute to the current flow, MOSFETs have a high switching speed capability (exceeding several hundreds of kHz in practical applications).

2.1. Operation Modes of the MOSFET

For MOSFET to carry Drain current, a channel between the Drain and the Source must be created. This occurs when the Gate-to-Source exceeds the device threshold voltage (V_{th}). For v_{GS}>V_{th} the device can be either in the triode region (constant resistance) or in the saturation region depending on the Drain to Source v_{DS} value as shown in Figure-3.

image
image469×323 23.8 KB

Figure-2. Working regions of the MOSFET based on the i_D vs v_{DS} characteristic.

When the MOSFET is used as a switch, only triode and cut-off regions are used, whereas, when it is used as a controlled-current source, the MOSFET must operate in the saturation region.

2.2. Parasitic Capacitances of the MOSFET

Parasitic Capacitances are important parameters that affect the MOSFET’s switching behavior. They are located between the device’s 3 terminals, namely: Gate-to-Source (C_{GS}), Gate-to-Drain (C_{GD}), and Drain-to-Source (C_{DS}) capacitances, see Figure-4.

image
image419×409 14.1 KB

Figure-3. MOSFET parasitic capacitances.

The values of these capacitances are non-linear and a function of device structure, geometry and, particularly, of bias voltages. The MOSFET parasitic capacitances are given in terms of the typical device datasheet parameters (Figure-5) that are easier to measure C_{iss}, C_{oss} and C_{rss} . The relation is shown in Figure-4 bottom equations.

image
image418×316 13.2 KB

Figure-4. Typical Capacitance plots of a MOSFET Datasheet.

3. Switching-Time Calculations (Turn-On and Turn-Off)

The turn-On and turn-Off processes of semiconductor devices are not discrete events; there will be a delay time between i_{DS}=I_{DS_{MAX}} (On state) and i_{DS}\approx0 (Off state). According to the well known MOSFET switching behavior, these times can be divided into 3 different intervals of time, as can also be seen in the figures for turn-On and turn-Off events: Figure-6 and Figure-7, respectively. In this document we will find a way of calculating:

  • t_{10_{ON}}, turn-On delay time, which is the time it takes v_{GS} to reach V_{th}.

  • t_{21_{ON}}, turn-On rise-time, which is the time it takes drain current to go from i_{DS}\approx0 to i_{DS}=I_{DS_{MAX}}.

  • t_{32_{ON}}, turn-On plateau time, which is the time it takes the drain-source voltage v_{DS}, to go from its maximum value v_{DS}=V_{DS_{MAX}} to its ON-state voltage. Note that, during this time the v_{GS} remains at plateau value V_{gp_{ON}} (due to Miller effect).

  • t_{10_{OFF}}, turn-Off delay time, or the time it takes v_{GS} to go from its maximum value to the plateau value V_{gp_{OFF}}.

  • t_{21_{OFF}}, turn-Off plateau time, which is the time it takes v_{DS} to go from its ON-state voltage back to V_{DS_{MAX}}.

  • t_{32_{OFF}}, turn-Off fall-time, which is the time it takes drain current to go from I_{DS_{MAX}} back to zero.

image
image425×211 15.6 KB

a)

image
image363×234 16 KB

b)

Figure-5. a) Turn-On MOSFET waveforms and b) Turn-Off MOSFET waveforms.

As mentioned before, for this Application Note we will consider a simple LSD power electronic circuit under inductive load. We will assume that the load inductance (L_0) is large enough to consider the current through it as constant with value I_0 (modeled with a current source in Figure-8). Also, a lossless flyback diode D (see Figure-8) used to pick up the load current during the MOSFET OFF-state is included.

image
image293×330 7.21 KB

Figure-6. LSD circuit with inductive load.

3.1. Turn-On Transition (t_{{10}_{ON}}, t_{{21}_{ON}} y t_{{32}_{ON}})
3.1.1. Turn-On Delay

First, let’s assume the device is off, the load current I_0 flows through D and v_{GS}=V_{GG}=0. The voltage v_{DS}=V_{DD} and i_G=i_D=0. At t=t_0, the voltage V_{GG} is applied (Figure-7). The sudden voltage in V_{GG} starts moving charge from C_{GS} and C_{GD} through R_G.

image
image294×333 9.82 KB

Figure-7. MOSFET during t_{{10}_{ON}} with v_{GS}<V_{th} and i_D=0.

During t_0\le t<t_1 (t_{{10}_{ON}}), v_{GS}<V_{th} having the MOSFET in the cut-off region with i_D=0 regardless of v_{DS} value.
This interval represents the delay turn-on time needed to bring voltages at C_{GS} and C_{GD} from zero to V_{th} and from V_{DD} to V_{DD}-V_{th}, respectively. The expression for the t_{{10}_{ON}} can be obtained considering that the Gate current is given by:

\begin{equation} i_G\ =i_{C_{GS}}+i_{C_{GD}}. \end{equation} \tag{1}

Where:

\begin{equation} i_{C_{GS}}=C_{GS}\frac{dv_{GS}}{dt};\ \ \ \ i_{C_{GD}}\ =C_{GD}\frac{d\left(v_{GS}-v_{DS}\right)}{dt}. \end{equation}

Given that during t_{10_ON} the only voltage changing with time is v_{GS} (v_{DS}=V_{DD}, constant) we can rewrite the equation as follows:

\begin{equation} i_G=\left(C_{GS}+C_{GD}\right)\frac{dv_{GS}}{dt}, \end{equation}

On the other side, i_G\ =\left(V_{GG}-v_{GS}\right) / {R_G} , so the equation can be expressed as:

\begin{equation} \frac{V_{GG}-v_{GS}}{R_G}=\left(C_{GS}+C_{GD}\right)\frac{dv_{GS}}{dt}. \end{equation}

Therefore, solving the differential equation for v_{GS}, t>t_0 and v_{GS}\left(t_0\right)=0 we obtain:

\begin{equation} v_{GS}\left(t\right)=V_{GG}\left(1-e^ \frac{-\left(t-t_0\right)}{\tau}\right), \end{equation}

where \tau is defined by

\begin{equation} \tau=R_G\left(C_{GS}+C_{GD}\right). \end{equation} \tag{2}

This result is valid as long as v_{GS}<V_{th} and i_D=0. Solving for t_{{10}_{ON}}:

\begin{equation} t_{{10}_{ON}}=\tau ln\left(\frac{V_{GG}}{V_{GG}-V_{th}}\right). \end{equation} \tag{3}

3.1.2. Rise Time

For t_1\le t<t_2 (t_{{21}_{ON}}) the condition v_{GS}>V_{th} is true causing the MOSFET to start conducting having i_D\neq0. This initial stage of the turn-On current is given by the transconductance equation:

\begin{equation} i_D=g_m\left(v_{GS}-V_{th}\right). \end{equation}

image
image517×308 8.02 KB

Figure-8. Input transfer characteristics for small changes

As long as v_{GS}<V_{plateau}, the equation for v_{GS} remains the same as in t_{{10}_{ON}}, so:

\begin{equation} i_D\left(t\right)=g_m\left[V_{GG}\left(1-e^\frac{-\left(t-t_0\right)}{\tau}\right)-V_{th}\right]. \end{equation}

image
image543×366 8.97 KB

Figure-9. MOSFET during t_{{21}_{ON}} with v_{GS}>V_{th} and i_D<I_0.

Reaching t=t_2, i_D arrives at its maximum value of I_0. Considering i_D\left(t_2\right)=I_0, the time interval t_2-t_0 can be solved from i_D\left(t\right) equation previously found, resulting:

\begin{equation} t_2-t_0=-\tau ln\left[\frac{g_m\left(V_{GG}-V_{th}\right)-I_0}{{g_mV}_{GG}}\right]=-\tau ln\left[1-\frac{1}{V_{GG}}\left(\frac{I_0}{g_m}+V_{th}\right)\right], \end{equation}

from Figure-6, when t=t_2, v_{GS} is also constant and equal to its On-State Plateau Voltage V_{gp-ON} (S. Liu, et all.), then we can write:

\begin{equation} i_D\left(t\right)=g_m\left(v_{GS}-V_{th}\right)\approx I_0\ \ \rightarrow v_{GS}=\frac{I_0}{g_m}+V_{th}=\ V_{gp-ON}, \end{equation}

allowing to simplify:

\begin{equation} t_2-t_0=-\tau ln\left(1-\frac{V_{gp-ON}}{V_{GG}}\right)=\tau ln\left(\frac{V_{GG}}{V_{GG}-V_{p-ON}}\right), \end{equation}

then finally, t_{21_{ON}} can be obtained using t_{10_{ON}} found previously:

\begin{align*} t_{{21}_{ON}}&=\left(t_2-t_0\right)-t_{{10}_{ON}}\ , \\ t_{{21}_{ON}}&=\tau ln\left(\frac{V_{GG}}{V_{GG}-V_{p-ON}}\right)-\tau ln\left(\frac{V_{GG}}{V_{GG}-V_{th}}\right), \\ t_{{21}_{ON}}&=\tau ln\left(\frac{V_{GG}-V_{th}}{V_{GG}-V_{p-ON}}\right). \tag{4} \end{align*}

3.1.3. Turn-On Plateau

For t_2\le t<t_3\ (t_{{32}_{ON}}), {i_D=I}_0 and C_{DS} discharges from {v_{DS}=V}_{DD} to v_{DS}=I_0R_{DSon}, where R_{DSon} is the On-state resistance of the MOSFET.
Since v_{GS} during t_{32_{ON}} is constant, the entire gate current flows through C_{GD}:

\begin{equation} i_G\left(t\right)=i_{C_{GD}};\ \ \ \ \ \ \ i_G\left(t\right)=C_{GD}\frac{d\left(v_{GS}-v_{DS}\right)}{dt}, \end{equation}

and:

\begin{equation} i_G\left(t\right)={-C}_{GD}\frac{dv_{DS}}{dt};\ \ \ \ \ \ \ \ \ \ i_G\left(t\right)=\frac{V_{GG}-v_{GS}}{R_G}, \end{equation}

considering v_{GS}=V_{gp-ON} , v_{DS}\left(t_2\right)=V_{DD} and the interval ∆t=t_{{32}_{ON}}:

\begin{equation} ∆v_{DS}=v_{DS} \left(t3\right)-v_{DS} \left(t2\right)=-\frac{VGG-V_{gp-ON}} {R_GC_{GD}}t_{{32}_{ON}}. \end{equation}

The time interval t_{{32}_{ON}} is determined by assuming that at t=t_3 the drain-to-source voltage reaches its minimum value determined by its on resistance:

\begin{equation} v_{DS}\left(t_3\right)\approx I_0r_{DS\left(on\right),} \end{equation}

image
image429×437 10.6 KB

Figure-10. MOSFET during t_{{32}_{ON}} with v_{GS}>V_{th}, i_D=I_0.

Then, the time t_{{32}_{ON}} is obtained:

\begin{align} I_0r_{DS\left(on\right)}-V_{DD}&=-\frac{V_{GG}-V_{gp-ON}} {R_GC_{GD}}t_{{32}_{ON}}, \\ t_{{32}_{ON}}&=R_GC_{GD}\frac{V_{DD}-I_0r_{DS\left(on\right)}}{V_{GG}-V_{gp-ON}}. \tag{5} \end{align}

3.2. Turn-Off Transition (t_{{10}_{OFF}}, t_{{21}_{OFF}} y t_{{32}_{OFF}})

A similar analysis as the one performed in the previous section can be done for the Turn-Off transition timings. For reason of space, only the results are shown below, but procedure is available upon request.

3.2.1. turn-Off Delay

Time it takes v_{GS} to go from its maximum value to the plateau value V_{gp-OFF}.

\begin{equation} t_{{10}_{OFF}}=\tau\ln{ \frac{ V_{GG} }{ V_{gp-OFF}}.} \end{equation} \tag{6}

3.2.2. Turn-Off Plateau

Time it takes v_{DS} to go from its ON-state voltage back to V_{DS_MAX}, in this case I_0r_{DS\left(on\right)} and V_{DD}, respectively:

\begin{equation} t_{{21}_{OFF}}=R_GC_{GD}\frac{\left(V_{DD}-I_0r_{DS\left(on\right)}\right)}{V_p}. \end{equation} \tag{7}

3.2.3. Fall Time

Time it takes drain current to go from I_{{DS}_{MAX}} back to zero:

\begin{equation} \ t_{{32}_{OFF}}=\tau\ln{\frac{V_{gp-OFF}}{V_{th}}.} \end{equation} \tag{8}

4. Conclusions and Series Outlook

This Application Note introduced the methodology for calculating switching times, turn-on and turn-off transitions, of Power MOSFETs in low-side driver configurations with inductive loads. These calculations form the foundation for estimating switching losses and comparing device performance.
Upcoming notes in this series will build on this foundation, guiding engineers through the process of extracting key datasheet parameters, performing complete power consumption calculations, and applying the methodology to real MCC MOSFET part numbers. Each note is designed to provide practical insights and tools for making informed component selections in power-sensitive designs.
By using a consistent application example throughout, an LSD circuit with an inductive load, this series aims to simplify the comparison of switching losses across different MOSFETs, whether from multiple vendors or within a single product line.

Don’t forget to check Application Note: [Guide for Power Loss Calculations in MOSFETs - Part 1: An Approach to Estimate Switching Time Intervals in Power MOSFETs ]( [Application Note Quick Guide for Power Losses Calculation in MOSFETs - Part 1 MCC semi micro commercial components.pdf]( Application Note: Quick Guide for Power Losses Calculation in MOSFETs - Part 1)) in our website.

5. Bibliography

1 Like
電力損失の計算 パート1：パワーMOSFETのスイッチング時間間隔の推定手法