Mosfet failure. Suspect manufacturing defect?

Semiconductor Discrete Semiconductor Products
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1

Hello, I am having some interesting issues with this mosfet and would like your thoughts please:

DMN67D8L-7

It is rated for +/-30Vgs, 60Vds, and much more current capability than I need.

My issue is the mosfet wears out and pops. There are two failure modes:
1: a very audible pop and the gate is blown inside the discrete package, such that, the gate is floating and will always leave the mosfet on (because of leakage from that drain).

2: the mosfet blows, smoking and dying open circuit.

Observation: there are some of these mosfets with significant leakage from drain to gate on first turn-on. Some mosfets do not do this. The mosfets with leakage tend to be the ones who burn out in smoke or a gate pop; and the ones with no leakage tend to live indefintely and I cannot break them.

My circuit:

Fairly simple. 24Vds, 24Vgs. Source is grounded by a switch to let current flow through a solenoid of about 5mA.

I am using this mosfet is very sanitary conditions. The solenoid load has freewheeling diodes, capacitors and other suppressors from factory and work quite well. No inrush current.

Typically Vgs is always 24V. But during an operation some external functions will pull it low to ground. This is straight to ground, no resistance. Its a mosfet so that is fine. This makes Vdg 24V and Vds 24V. That’s fine. All in spec.

There is another scenario where Drain may go to ground while gate is 24V. This makes Vds 0V, Vdg -24V, and the source can eitehr be ground or float.

Source never gets power. It can only float or ground.

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On my circuit board is an array of about 48 of these fellas. I heat gunned them off and put on new ones at 320C for about 45 seconds (mostly waiting for baord to warm up and then i stop right after solder flow).

These work wonderfully, I cant break them. I take a ground wire and just run it around the fets making the gates and drains blink high and low quickly, the solenoids firing rapidly, no issues.

I then sent an email to my assembly shop its their fault. But it gets worse:

I went up today and turned on the board. I fired a bunch of solenoids and a mosfet blew in smoke. Another had that gate pop and floats. And as I continue to fidget with it more mosfets break. It’s like they weakened over night while the board was de-enegerized.

What’s going on with these fets? I have thousands of them across important products and they are just deciding to give out. The onset of failure is observing increasing drain to gate leakage usually.

1: are these mosfets defective?
2: is there an asymmetric tolerance where Vgs may be +/-30V but Vdg is the traditional +/-20v and my 24V is wearing them out? The data sheet does not say Vdg max, but most mosfet sheets dont.

I also cannot get a hold of Diodes incorporated for tech support.

I’m pretty sure Vdg polarity reversal wouldnt hurt anything. I have been doing that on other boards with other mosfets but they reverse very rarily where on this board it is very common.

2

I am checking with our associates.

3

Here’s an accurate drawing of my circuit.

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And for convenience here are the max ratings from the data sheet:

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My two power supplies have current meters on them and I only see 5-10mA per solenoid. The circuit board is really just about 50 of these in parallel, so that drawing represents all of them.

fairly sanitary, electrically speaking.

4

Greetings,

So long as one’s sourcing product through reputable channels, I advise holding manufacturing defect as a theory of last resort, not to be wielded without a large volume of supporting evidence.

A FET’s Vgs rating is a thing to be observed strictly, and given ample breathing room. Violating it commonly results in a short circuit failure, progressing to an open circuit more or less promptly depending on the impedance of the short and any current limiting effect of a connected load. Some devices appearing to fail short and others appearing to go directly to smoke is exactly the behavior I’d expect from an apparatus that’s marginal in this regard.

I don’t see any gate protection indicated in the diagram, and while the solenoid may incorporate some sort of protection against L*di/dt, any parasitic inductance in the interconnects probably doesn’t and the bouncing of mechanical switches can bring a surprising amount of di/dt to a party.

How much is “significant” and how is it being measured? How has it been established that this apparent leakage is through the FET itself, rather than through some other external path?

2 Likes
5

Hello Thomas,

As I understand your circuit, the source floats. It is possible that the “stars can align” resulting in spikes that violate V_{GS} with resulting destruction of the gate oxide layer. The most likely stars of misfortune are antenna like properties of parallel circuit traces.

As a starting point, have you considered:

  • 1 k to 10 kΩ bleeder resistor source to ground
  • 1 kΩ series resistance for the gate
  • back to back Zener diodes to clamp gate to source

Thoughts?

APDahlen

1 Like
6

Hello!

Source was digikey, who I buy from all the time.

I do have a 1nF cap I forgot to mention in that diagram. But I only casually applied it: there’s an array of 28 mosfets in one quandrant of the board who all connect their gates to one 24V line; and at the start of that line where it begins distributing to the gates is a single 1nF cap servicing all those gates. The farthest FET is an inch away from that cap. If that is insufficient you can certainly argue that.

I might agree with the chance of di/dt, but I have observed some fets die with 24Vd, 0Vg, float source. The burnout was upon energizing the drain or grounding the gate; no solenoid action. The other scenario is the reverse: 0Vd, 24Vg, source float. This is actually how I most commonly inspire a mosfet to die, I can generally actuate the solenoid hundreds of times, leave it on over night like I did coming in this morning and then actuate that fet repeatedly and no issues with those fets. It’s so inconsistent.

My main observation is Polarity reversal of the gate - drain voltage tends to cause more failures.
Then after having done a one or two polarity reversals, I have a higher failure rate. I still have a few fets whom will NOT die no matter what I do to them lol.

Significant leakage: its enough to light up an LED so a range of 1-10mA. I say significant relative to what it would take to elevate the gate line. I could put a pull down on the gates but in doing so would just burnout the fets automatically instead of waiting for me to manually apply a pull down; if that makes sense.

The gates have a natural pull down from the powersupply when it is shut off. This is the case when the board is hooked up to our industrial equipment to do its thing. But all these burnouts are on the bench too so we can’t blame equipment noise.

I do know for a fact that these fets brand new, fresh from digikey, have highly varying gate-drain resistances. Below are a couple pictures but I am a new user and can only send 3 pics at a time. I measured about 25 units in their tape like this:
image
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And here are the ones on my board. They are all 2kOhms their gate-drain is parallel. But if you do some algebra, where you have 20 parallel resistors producing a net of 2kOhms, then the average resistor is 40kOhms if I am not mistaken. This is not an appropriate mosfet gate resistance?
image

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One fet might be 2-3Mohms, another is 5-6Mohms. I would speculate the 2-3Mohm units would be the ones who die first.

And if you parallel 20 mosfet gates at say 3Mohms, you dont get 2kOhms like I was measuring. So soldering these onto the board ruins them. Measuring them one at a time after heat treatment tanks some of their gate-drain resistences between 10kOhm to 250kOhm. While a few maintain MegaOhms.

I heard back from my assembler and they said they dont go above 250C. And during the wave soldering they don’t go above 200C. Seems ok to me and shouldnt hurt these parts. But the resistances are sharply affected by heat exposure.

I know manufacture defect is super unlikely but…

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Be mindful of the difference between knowledge and perception. If a person were to overlook the possibility that the packaging materials might have a non-negligible resistance of their own that measures differently depending on the pressure applied to the probes, such a test could lead to mistaken conclusions.

Have the waveforms applied to the FETs been directly observed with an o-scope?

8

The stars aligning:

I can’t do source resistors only because the solenoid is topside of the drain; so a resistor can leave the solenoid active, or leave an indicator LED inside the solenoid live and be a bit confusing to read.

1kOhm at the gate, I guess I could try that later today. What I predict is the current limit caused by the resistor will drag down my gate voltage during 0Vd and 24Vg because some FET’s leak so bad gate to drain. We’ll see.

I’ll grab some zeners from home for tomorrow and try that. I’ll have to solder a bunch of fresh fets onto the board for a credible test.

The reason I dont think its a star alignment is the randomness of failure in any of the 48 total fets on the board. Some fets simply will ‘not’ die, and I can move that fet to a pad where a fet had died and it still lives on. Its just clear to me there are good units and bad ones.

Many of the gate traces parallel each other at 10mil apart from each other for a few inches as they come into their gates. But I do that all the time on other projects and never had an issue with crosstalk @ 24v low speed (though with SOIC-8 package mosfets, but same type of specs with +/-30Vgs max and current rating.) When i say low speed, I mean as fast as your hand can turn something on and off which is nothing to a fet who can do kilohertz or megahertz.

To an earlier point by rick, I agree that it sounds like we are violating gate tolerances because of the failure modes we are getting. Which is why I questioned if the device is not +/-30Vdg max, and is perhaps the traditional 20V limit most mosfets are made for, making this fet asymmetrical:

+/-30Vgs max
+/-20Vgd max

And again, I cant get ahold of diodes incorporated to verify that assumption. Data sheet only specifies Vgs. But my failure modes make me think its 20Vgd and so punching it with +/-24Vgd a few times just hammers it to death.

Or they are simply crap because of the resistence measurments I described earlier. I dont know.

I also have a similar mosfet from another company arriving soon. I’ll solder those on and maybe that will be revealing.

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At least it seems like thomas isn’t doing anything obviously wrong. Logically speaking, I am meeting all the component specifications and operating a mosfet with appropriate knowledge. So its something extraordinary…

9

Even after I say the following, what you said is still valid:
I made sure I applied the prove tips quite firmly, equally, and watched the resistance stabilize on the DMM. I clearly can influence this number by wiggling the probe around and I did intentionally to find what might be the real resting point for the resistance and that it was repeatable.

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I will also bring my scope in tomorrow and probe around. Good idea.

11

Well if this aint the nail in the coffin I don’t know what is.

I just decided to do a no load test. Why not.

Got some fresh fets down. Drain is open, source is open, and I put +24DC on the gate. I ground some sources and 5 out of 20 burned. These were all burns, no pops. Smoked until open circuit.

Are we all forgetting something about how mosfets work? Or are these just trash mosfets? My shadow-of-doubt is shrinking rapidly here. Unless we are over looking something super simple, I thought gates were high impedence :rofl:

Also the 15 left standing wont burn out after many repeated source opening and groundings. I did not attempt drain polarity reversal because I’m lazy and would have to shift a resistor around as a safe load. I can simply speculate I would break a few more.

12

Can someone internal to digikey snag a few of these fets and do a simple breadboard quality control test like I am doing? I recommend about 10 mosfets, tedious, but that way you will see the statistics I am getting. All 24V, 5mA load. Use an LED + 5K resistor for load. My solenoid is irrelevant at this point.

Don’t forget I have a 1nF cap on the gate power line. There is some mild filtration, not to mention the fat caps in the power supply I’m using.

I need a third party validation.

13

Thank you for your follow up.

I pulled up our history on this part, we consistently sell a fair amount of this part without any quality concern calls. That’s not to say you might have gotten the first of a new bad batch but the likelyhood that happened is extremely low.

The repeatability of your failures and your schematic point to issues with your implementation.

As was previously suggested, try putting something like a 1k ohm resistor in series with each of the gates and a 10k ohm resistor gate pull down and see if that helps. Also make sure to ground yourself while handling the devices as MOSFETs are susceptible to ESD handling damage.

A schematic of your new circuit would be helpful to be able to further advise.

Edit:
Here is an App Note Note from Toshiba that depicts the gate resistor and pull down gate-source.

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AKX00068-1 (semicon-storage.com)

14

Ok, I did this following tests. Here is an updated circuit. I do one with and without gate resistors. And I am well grounded, static free.

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Notice I lowered to 12V. I am doing this on a fresh board from my assembler. never energized before. I labeled the switches for easier communication:

My experiment was this:

I first move GATE SWITCH to 12v,
Then move SOURCE SWITCH ground
then move DRAIN SWITCH to 12v. LED turns on.
I open and ground the SOURCE SWITCH 10 time for 1sec periods @ 50% duty cycle.
No problems. I can repeat this indefinitely and as fast as my hand can do.

I then move SOURCE SWITCH to float
then move DRAIN SWITCH to ground.
then move GATE SWITCH to ground.
then move DRAIN SWITCH to 12V, then back to ground.
then move GATE SWITCH to 12V, then back to ground.
Then move GATE SWITCH to 12V, and DRAIN SWITCH to 12V. (no LED action at this point because SOURCE is open.)
Then move SOURCE SWITCH to ground. The mosfet blows. 3 of them together!
When I say together, its one at a time because I have to manually move the ground lead on the ribbon cable from one fet to the next. So it was pop, pop, pop. And I stopped there. This was a very high failure rate, don’t expect that luck all the time. Usually only 1 dies out of 3.

The last series of actions I did cause Vgd to reverse from +12 to -12V and then back to 0V difference.

I did another test with a 10k pull down, and a series 10k to the gate. This procedure still destroys the mosfet, it just does not burnout in balls of fire because the resistor is limiting the short circuit after failure. It just simply dies in silence.

Also, this is at 12V…
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Here is a picture of the resistor test. Notice the LED is super dim. The mosfet blew, but has not enough current going through it to quite finish it off to open circuit because of the gate resistor we added (not shown in schematic cuz Im picture limited in this forum). After about 30 seconds I saw the LED finally stop.
image

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here was with resistors on the gate

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these are simple through hole resistors out of a box of a variety. 1/8W, 5% variance. The cap is ceramic solder mounted near the fet.

16

I mean, i do so many things with mosfets I never have this issue. I use fets for 4 switch DC-DC converters, like just an example, dont shoot me if I have one of them backwards I just drew it for example

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and these fets experience all kinds of polarity reversals and high current and pulse/surge current and di/dt and dv/dt and crosstalk and overshoot and etc etc. Not with this particular mosfet but all mosfets alike, I’m experienced with these suckers.

I use fets for microcontroller ports, amplifiers, solenoids and relays, DC-DC converters etc.

But this one fet I chose, doing the simplest task I can imagine, is giving out on me and its annoying to say the least. I just want to be proven wrong and fix it and move on :sweat_smile: I dont care who’s fault it is. I can take blame if I’m being dumb.

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Hi @thomas.wright,
I once blew up a tubefull of IGBTs with an equivalent circuit. It turned out that the capacitor shunting the gate and some resistance at the source formed an oscillator. Can you try to repeat the test without the 1nF gate capacitor (and preferably having the 10.2k shunt resistor permanently tied from the gate to ground, not behind the switch)?
Cheers, heke

2 Likes
18

Good point, Heke.

One I had a common collector amplifier that oscillated. You wouldn’t think such a simple circuit would behave so poorly, but there it was. As I recall, it took some effort with stiff rail bypass capacitors to eliminate the ringing.

I’m looking forward to @thomas.wright response.

Sincerely,

Aaron

2 Likes
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That is an interesting point. I’ll flick off the 1nF cap’s and see what happens.

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20

No affect. I just took a screw driver and tapped off the caps and tested with new fets on a new board.

For a bit I was getting hopeful, none of the fets were dying. But then they still blow when I do the following:

Drain high, gate high, source low
float source
pulldown gate,
pulldown source (nothing happens because gate is low)
float source
pullup gate
pulldown source, mosfet pops:

I had a one burn up, and another just pop the gate open so its always in the on state. And 23 other fets who still function and are all fed by the same power (these are all in parallel) and within 50mil of each other in array). If I repeat the above over and over and over, I will continue to break fets just by the dice roll until about 10 remain that never ever break.

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My most consistent observation is the fets will have a high chance of failure when I ground the gate, and pull it back up. The above operation to be more exact.

This operation is critical for our interlock safety system; (I mean, its basic mosfet operation. The gate should work LOL)

This happens at 12 and 24V, I tried both.

I forgot my scope so that’ll happen tomorrow. But I anticipate it will be hard to capture the event.

But that operation above, that doesn’t strike anyone off? Nothing wierd? like, “Oh thomas its breaking because xyz, you are never to do that to fets” I dont know.