That’s essentially how you would connect it. In terms of functionality, these work based upon the voltage the MOSFETs “see” between the gate and the source. The FETs are voltage controlled devices. As the voltage approaches the “threshold gate voltage” of each FET, they start to turn on and allow current to flow through themselves. Below this threshold, they conduct only nanoamps; thus they are essentially an open circuit.
Notice that in the schematic you referenced, pin 3 (the gate of M1) is connected to the “+” side of C1 and pin 4 (source of M1) is connected to the “-” side of C1. This means that the gate to source voltage is the same as the voltage across each capacitor. When charging the capacitor string, the voltages of each capacitor will begin to rise, but they will rise at different rates, based on variations in leakage current and other factors. This is why balancing circuits are necessary. If not employed, some capacitors may exceed rated voltage before others reach the rated voltage.
With the special ALD MOSFET array, when the voltage of any capacitor in the series approaches the threshold voltage of the FET connected in parallel with that particular capacitor, the FET begins to conduct current around that capacitor and pass that down to the next capacitor in the series. The higher the voltage on any capacitor, the more current it conducts, and that current grows exponentially with increased voltage. The effect is that all of the capacitors can reach their optimal voltage value with no overcharging of any one capacitor and with the least amount of balancing current.
If you have plenty of excess power available you could employ a simpler balancing circuit by just placing a resistor in parallel with each capacitor. To properly balance them with this method, the resistor must be sized to allow at least 10x the current through them as there is leakage current through the capacitors. In your capacitors, the leakage is specified to be as high as 750uA per cap, so the resistors would have to be no more than 180 Ohms for two caps in parallel {2.7V / (10 x 2 x 750uA) = 180 Ohms}. They could be physically, very small, as power requirements would only be about 40mW. However, with this method, you would have a continuous current draw of at least 15mA even when the capacitors were fully charged in order to maintain the balance.
If you are considering the ALD chips, we will need to figure out which threshold voltage best matches the requirements of your capacitors. Also, for higher system reliability, you might want to consider lowering your charge voltage by a tenth of a volt or so per cap, to give yourself a little margin for short-term overvoltage conditions which can arise under real-world conditions. This would mean dropping your overall voltage down to 7.8V from 8.1V. This will, of course, lower your reserve total energy storage slightly, but would likely add reliability and life expectancy.
I will take a closer look at the specs of your cap and see which threshold voltage makes the most sense in your particular case.