I am looking at the PLA172P solid state relay. It has a blocking voltage rating of 8000 (Vp). The application is to use this relay to act as a controllable switch for a voltage source of 800 VDC. I wanted to confirm things.
Is the blocking voltage only for DC voltages, or can it be considered for AC voltages?
What does the Vp units stand for?
How do I determine the control power requirements for this device?
It would seem that there’s an extra zero in that figure, per the datasheet for PLA172P:
In any case, Vp designates a peak/maximum voltage stress, and is a figure which should be expected to cause device failure if exceeded. The lack of any margin between the part’s failure threshold and your nominal supply voltage would strongly recommend against application in the manner suggested.
The part in question is shown as having a FET-type output and as such shouldn’t care much about the waveform (or lack thereof) being switched, so long as it’s operated within the limits given in the table.
Input power requirements are minimal, since the input side is essentially just an indicator-class LED that can be driven in exactly the same fashion as one might do for any other such shiny gadget. The part’s behaviors are characterized at a 5 mA drive level, at which the input forward voltage drop can be expected to land somewhere between 0.9 and 1.5V at room temperature:
Thank you for the throughout feedbcak. In regards to first response item, would it be recommended to have about a 25% voltage margin gap? Voltage safety margin: 800*.25 = 1000V. In other words, will a relay rated at 1000V be preferable?
Selection of a suitable solid-state relay depends to a great degree on the character and nature of the source & load being switched and the system in general. Cabling and interconnects can (for example) be expected to introduce some parasitic inductance likely to cause a voltage spike during turn-off, and reactivity on the part of the switched load tends only to aggravate such effects. Unregulated sources can vary around their nominal values and even regulated sources can exhibit overshoot effects in response to changes in load.
Semiconductor failures due to voltage overstress tend to be very “brittle” in character, meaning they have very little ability to absorb energy in the process. Long story short, the onset of failure results in power dissipation in the device, causing a localized temperature increase that lowers the threshold for additional failure events. These dissipate more power and increase temperature further, prompting additional failures and so on and so on in a self-feeding cycle having an explody-ness of character roughly proportional to the square of the supply voltage in question.
That’s perhaps the long way of saying that a 25% margin and a pair of firmly crossed fingers is not a solution I’d bet on here. A proper analysis of the matter would be best and not to be skipped if it’s something that’s going to commercial production, but if one’s talking about a more informal context I’d recommend starting with closer to a 250% margin on a spec like that.
