DE0 nano soc atlas GPIO inout help

Embedded Development Boards, Kits, Programmers
,
1

I cannot drive GPIO inout on Atlas DE0 nano soc. A simple test using all the altera privitive buffers show on Signal Tap and the oscilloscope nothing when the GPIO is considered inout. Even when driving not tri-state signals:

entity MasterSlave is
	port 
	(
		CLOCK_50		: in std_logic; 
		GPIO_1			: inout std_logic_vector(3 downto 0) := (others =>'Z');
		GPIO_0			: out std_logic_vector(1 downto 0);
		HPS_I2C1_SDAT	: inout std_logic;
		HPS_I2C1_SCLK	: out std_logic;

...


	clk <= CLOCK_50;

	process (clk, data)
	begin
		if rising_edge(clk) then
			data_bin <= '1';
			if data='0' then
				data_bin <= '0';
			end if;
		end if;
	end process;
	
	data_n <= '1' when data = '0' else '0'; 
	 
	control_tri <= '0' when control = '0' else 'Z';
	control_n <= '1' when control = '0' else '0';
	
	GPIO_0(0) <= data_bin;
	GPIO_0(1) <= control;
	
	I_control_n_GPIO_1_0_iobuf: ALT_IOBUF 
	port map (i => '0', oe => control_n,o => data_GPIO_1_0,io => GPIO_1(0));

	process (clk,data_GPIO_1_0)
	begin
		if rising_edge(clk) then
			data_GPIO_1_0_reg <= data_GPIO_1_0;
		end if;
	end process;

	
	I_control_GPIO_1_1_iobuf: ALT_IOBUF 
	port map (i => '0', oe => control,o => data_GPIO_1_1,io => GPIO_1(1)); 
	
	process (clk,data_GPIO_1_1)
	begin
		if rising_edge(clk) then
			data_GPIO_1_1_reg <= data_GPIO_1_1;
		end if;
	end process;

	I_control_n_GPIO_1_2_tri : TRI
	port map (a_in => '0', oe => control_n, a_out => GPIO_1(2));

	I_control_GPIO_1_3_tri : TRI
	port map (a_in => '0', oe => control, a_out => GPIO_1(3));

	I_control_n_HPS_I2C1_SDAT_iobuf: ALT_IOBUF 
	port map (i => '0', oe => control_n,o => data_HPS_I2C1_SDAT,io => HPS_I2C1_SDAT);	
	
	process (clk,data_HPS_I2C1_SDAT)
	begin
		if rising_edge(clk) then
			data_HPS_I2C1_SDAT_reg <= data_HPS_I2C1_SDAT;
		end if;
	end process;

	I_control_HPS_I2C1_SCLK_outbuf: ALT_OUTBUF 
	port map (i => control,o => HPS_I2C1_SCLK);