Yes, it would be helpful if you could post those FET waveforms.
If they don’t show anything amok during the time frame captured, that’d be suggestive of something changing mid-process. Might be design/operating point related, or something more pedestrian like a rogue connection somewhere–the perf board and fly wire construction method lends itself to that sort of thing.
One way or another, the FETs are failing because one or more of their physical limitations are being exceeded–the trick is figuring out which one. If it’s not voltage related, it’s likely current/power related; instantaneous power dissipation during switching events can be intense enough to heat the die to the poof point before the package exterior warms significantly, if the switching business isn’t completed promptly. That could conceivably result from oscillations in the gate drive (with zero ohm gate resistors) in one case, and from excessively long gate charge times in another after switching to 100 ohms. Or a sketchy signal to the gate driver might cause a few rapid transitions that get averaged out to a Vgs of ‘half-on’ for a millisecond or so. Or it could be something else entirely… I can’t 'scope things myself from this side of the screen, so the more info and detail you can provide, the better.