Taking advantage of FPGA Hardware Development in C with Microchip

Taking advantage of FPGA Hardware Development in C with Microchip

With the introduction of PolarFire™ System-on-Chip (SoC), designers now have the ability to design and evaluate the true trade-off of realizing an application using processors or accelerating functions within FPGA fabric. Using the extensions to our development tool chain, this presentation will show how C code can be written for RiscV, evaluated and accelerated by converting it to FPGA logic using SmartHLS.

Presented by Peter Trott, Ex-Microsemi

SmartHLS – Smart High-Level Synthesis supports Better Productivity and Fewer Bugs

Productivity: 2-5 X faster design cycle

Quality: Fewer bugs, easier to understand & maintain C/C++ code

Faster: Accelerated software model verification

Ease of Use: FPGA Portability

Performance: 2-10 X embedded software acceleration

Support for PolarFire®, PolarFireSoC®, SmartFusion®2, IGLOO®2



Design RTL (Lines) C++ (Lines) Improvement
Alpha Blend 283 39 7 X
Color Space Conversion (RGB2YCbCr) 158 32 5 X
Color Space Conversion (YCbCr2RGB) 182 36 5 X
Gaussian Filter 276 65 4 X
Digit Recognition 1,984 334 6 X

Faster Verification in C++ with significantly fewer lines of code provide accelerated verification, easier to understand and fewer potential bugs!

Gaussian Filter in C++ vs Gaussian Filter handwritten in Verilog
(65 lines) vs (276 lines without submodules)


More Detailed Information


Image Processing on PolarFire Kit

Multi-threaded digit recognition on PolarFire Video Kit

AXI interfaces to DDR and Mi-V soft Processor on Video Kit

Product Documentation

SmartHLS Software User Guide

SmartHLS Software Installation Guide

SmartHLS Tutorial


Benefits of SmartHLS Whitepaper

Migrating Motor Controller C++ Software to a PolarFire® FPGA with SmartHLS Whitepaper

Tutorials and HLS Examples


SmartHLS Product Page