Character LCD Module Controller (VHDL)

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Version 3.0: lcd_controller.vhd (6.4 KB)
Added LCD configuration using generics

Version 2.0: lcd_controller_v2.vhd (8.0 KB)

Version 1.0 is no longer available.

Example that instantiates the lcd_controller.vhd component and uses it to write “123456789” to an lcd module: lcd_example.vhd (3.3 KB)


This LCD controller is a VHDL component for use in CPLDs and FPGAs. The controller manages the initialization and data flow to HD44780 compatible 8-bit interface character LCD modules. It was primarily developed pursuant to the Lumex LCD General Information datasheet. This example VHDL component allows simple LCD integration into practically any programmable logic application. Figure 1 depicts the controller implemented to interface between an LCD module and a user’s custom logic.


Figure 1. LCD Controller Implementation in PLD

State Machine

The LCD controller state machine consists of five states. Upon startup, it immediately enters the Power-up state, where it waits 50ms to ensure the supply voltage has stabilized. It then proceeds to an Initialize state. The controller cycles the LCD through its initialization sequence, setting the LCD’s parameters to default values defined in the hardware. This process completes in approximately 2.2ms, and the controller subsequently assumes a Ready state. It waits in this state until the lcd_enable input is asserted, then advances to the Send state. Here, it communicates the appropriate information to the LCD, as defined by the lcd_bus input. After 50us, it returns to the Ready state until further notice. If a low logic level is applied to the reset_n input at any time for a minimum of one clock cycle, the controller resets to the Power-up state and re-initializes. Figure 2 illustrates the LCD controller state machine.


Figure 2. LCD Controller State Machine

Port Descriptions

Table 1 describes the LCD controller’s interface.

Table 1. LCD Controller I/O Description


The LCD controller executes an initialization sequence each time it is powered-up or the reset_n pin is deasserted for a minimum of one clock cycle. The controller asserts the busy pin during initialization. Once initialization completes, the busy pin deasserts, and the LCD controller waits in the Ready state for input from the user logic.

The initialization sequence specifies several LCD parameters through a series of four commands:

  • Function Set (sets 4-bit/8-bit display, number of display lines, and character font)
  • Display On/Off Control (turns on/off the display, the cursor, and cursor blinking)
  • Display Clear (clears the display)
  • Entry Mode Set (sets increment/decrement mode, and turns on/off shifting)

The parameters values are specified by setting the GENENIC parameters in the ENTITY. Table 2 describes the parameters. The user can also send commands to the LCD to change any parameters after initialization.

Table 2. Generic Parameters Descriptions


Upon deassertion of the busy pin, the LCD controller enters the Ready state. The user logic can interface via the lcd_enable and lcd_bus pins to conduct transactions with the LCD module. The user initiates this process by issuing the desired data/instruction to the lcd_bus and asserting the lcd_enable pin. The LCD controller then asserts the busy pin and manages the transaction. When finished, the controller deasserts the busy pin, indicating that it is ready for another instruction. Figure 3 depicts the timing diagram for the beginning of a transaction.

Figure 3. Transaction Timing Diagram


The LCD control logic provided manages the initialization and data flow between custom user logic and the 8-bit interface mode of HD44780 compatible character LCD modules. The user can set the system clock frequency and change the default initialization parameters by setting GENERIC parameters in the ENTITY.

Additional Information

LCD General Information; Lumex, Inc. (880.2 KB)

HD44780U (LCD-II); Hitachi, Ltd. (297.4 KB)


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