This space contains material for programmable logic design (FPGAs and CPLDs), including IP cores, example designs, and tutorials. All topics are categorized and listed below.
Getting Started Tutorials
Efinity IDE from Efinix - Getting Started Tutorial
Instantiating VHDL Components in Verilog Modules
Lattice Diamond and MachXO2 Breakout Board Tutorial
Lattice Diamond and MachXO2 Breakout Board Tutorial (with Verilog)
Lattice Diamond Hierarchical Design Test Bench Tutorial
Microsemi IGLOO nano Dev Board Tutorial
Xilinx Vivado Design Suite - Getting Started
Interface Logic
7-Segment Display Driver for Multiple Digits (VHDL)
AC’97 Codec Hardware Driver Example
Character LCD Module Controller (VHDL)
Chip on Glass Graphic Display Driver with Lattice MachXO2 (VHDL)
Debounce Logic Circuit (Verilog)
Debounce Logic Circuit (VHDL)
I2C Master (VHDL)
I2S Transceiver (VHDL)
MachXO2 SPI Peripheral Expansion for HMI Applications (with VHDL)
mikroBus I/O Expander (VHDL)
Parity Generator (VHDL)
PS/2 Host Transceiver (VHDL)
PS/2 Keyboard Interface (VHDL)
PS/2 Keyboard to ASCII Converter (VHDL)
PS/2 Mouse Interface (VHDL)
PWM Generator (VHDL)
Quadrature Decoder (VHDL)
SPI 3-Wire Master (VHDL)
SPI Master (VHDL)
SPI Slave (VHDL)
SPI to I2C Bridge (VHDL)
TMDS Encoder (VHDL)
UART (VHDL)
VGA Controller (VHDL)
Control Systems, DSP, and Math Logic
Binary to BCD Converter (VHDL)
Booth Radix-4 Multiplier for Low Density PLD Applications (Verilog)
Booth Radix-4 Multiplier for Low Density PLD Applications (VHDL)
FIR Filter (VHDL)
IIR Filter Design in VHDL Targeted for 18-Bit, 48 KHz Audio Signal Use
Implementing Polynomials using Horner’s Rule and Fixed Point Arithmetic (VHDL)
Least Mean Square (LMS) Adaptive Line Enhancer (ALE) Design in VHDL
N-Bit Saturated Math Carry Look-ahead Combinational Adder Design in Verilog
N-Bit Saturated Math Carry Look-ahead Combinational Adder Design in VHDL
Pseudo Random Number Generator with Linear Feedback Shift Registers (Verilog)
Pseudo Random Number Generator with Linear Feedback Shift Registers (VHDL)
Serial vs Parallel Arithmetic with Polynomials (VHDL)
Stepping Motor Control (with VHDL)
Memory Modules
FIFO Buffer Module with Watermarks (Verilog and VHDL)
RAM (VHDL)
Peripheral Module Controllers
7-Segment Displays Pmod Controller (VHDL)
ADC AD7476A Pmod Controller (VHDL)
ADC AD7991 Pmod Controller (VHDL)
Accelerometer ADXL345 Pmod Controller (VHDL)
Accelerometer ADXL362 Pmod Controller (VHDL)
Ambient Light Sensor Pmod Controller (VHDL)
Capacitive Sensing AD7156 Pmod Controller (VHDL)
Color Sensor Pmod Controller (VHDL)
Compass Pmod Controller (VHDL)
DAC AD5541A Pmod Controller (VHDL)
DAC AD5628 Pmod Controller (VHDL)
DAC AD7303 Pmod Controller (VHDL)
DAC DAC121S101 Pmod Controller (VHDL)
Digital Potentiometer AD5160 Pmod Controller (VHDL)
Gyro L3G4200D Pmod Controller (VHDL)
Humidity and Temperature Sensor Pmod Controller (VHDL)
I2S Pmod Quick Start (VHDL)
Joystick JSTK2 Pmod Controller (VHDL)
Keypad Pmod Controller (VHDL)
NAV Pmod Controller (VHDL)
Real-Time Clock MCP79410 Pmod Controller (VHDL)
Temperature Sensor ADT7420 Pmod Controller (VHDL)
Temperature Sensor TCN75A Pmod Controller (VHDL)
Thermocouple Pmod Controller (VHDL)
Ultrasonic Range Finder Pmod Interface (VHDL)
Soft Cores
Digilent Arty A7 with Xilinx Artix-7 Implementing SiFive FE310 RISC-V
Efinix Trion T20 Implementing PulseRain Reindeer RISC-V Soft CPU
Getting Started with the Efinix Xyloni Development Kit