M2S010-MKR-KIT Ethernet Application VSC8541


Has anyone successfully created a design that uses the VSC8541 Ethernet PHY? I can can configure they chip and it looks like its attempting to auto negotiate the link (put a logic analyzer on the RJ45 terminals that would be pre-magnetics). This is a fairly new kit so I am beginning to wonder if the magnetics are configured incorrectly, I also haven’t found any indication that anyone has successfully completed a design with the VSC8541.

I have the kit connected to a 10/100/1000 Ethernet switch. Both products support auto MDIX detection and cat5e cables are being used. I have also tried disabling auto negotiation and using forced 100Mbps with no luck.



@thomasb1936 I did speak to my engineer who created the SmartFusion 2 Maker-Board Wiki and unfortunately he did not do any work with ethernet on his project. I have forwarded your post to my product manager to see if he has any insight or further information from MicroSemi.


I solved it and someone may want to add the details to the wiki.

The board correctly configures the two clock selection inputs for a 50 MHz external clock (I checked this many times). Which is REFCLK_SEL0 low and REFCLK_SEL1 high and it does this with 10K pull ups/downs. What I discovered in the fine print of the data sheet is internally they are both pulled up with roughly a 30k so the input that is pulled low is hovering about 0.6V above ground. Which counts as a high. The chip thinks it has a 125MHz clock instead of the 50MHz clock and it can’t auto negotiate a link. Fixed it by actively driving both clock select inputs to the correct level with the FPGA.

To get the chip up you cant count on the board pull up or use an internal FPGA pull up. The inputs must be driven. Maybe on future revisions of the board change the pull down to 1K or omit it all together.