In a previous article Alchitry Au FPGA Demo - Embedded / Development Boards, Kits, Programmers - DigiKey TechForum - An Electronic Component and Engineering Solution Forum the Alchitry Au V2 FPGA an excellent board that featuring the Xilinx Artix 7 XC7A35T-1C FPGA was described. Here in these articles we will cover the Alchitry Au V2 FPGA Development Board (Xilinx Artix 7) (1568-27874-ND)
This board is the version 2 of the previously described board. It features a Xilinx Artix XC7A35T-2FTG256I FPGA (speed and temperature grade upgrade over Au V1) with 104 IO pins broken out across two headers. It has 22 are triple voltage (3.3V, 2.5V, or 1.8V) of which 20 are LVDS_25 capable outputs. It includes 44 pins which are routed as 100 ohm differential pairs (includes 20 dual voltage pins). The remaining IO routed as 50 ohm single ended (~90 ohm when used as diff pairs), 2 1.35V pins on bank B, 8 pairs can be used as inputs to the XADC (0-1V input range), and the remaining IO is at 3.3V. All pairs can be used as LVDS_25 inputs except three pairs on bank B. There is a Control Header with 8 IO pins also connected to on-board LEDs. Also it has 1 IO pin also connected to on-board reset button. A dedicated XADC input (in the 0-1V range). Raw power input/3.3V regulated output. Includes a QWIIC connector (shares pins on bank B). It has a 100MHz oscillator, 1 button (typically used as reset). It has 256MB DDR3L @ 800Mb/s (400MHz), with 32MBit Configuration FLASH. A FT2232HQ USB → JTAG and USB → UART (12Mbaud max) connectivity. A 5-12V input voltage on-board power supply, 3.3V @ 4A (IO), 2.5V @ 500mA (voltage pins, derived from 3.3V), 1V @ 4A (VCCINT), 1.8V @ 1.2A (VCCAUX, triple voltage pins), 1.35V @1.2A (DDR3L) and 1.8V @ 200mA (analog).
By adding stackable expansion boards similar to shields or HATs called “Elements,” like this one with a prototype area,
or this one with different I/O devices like 7 segment displays, switches and LEDS,
or even this one that can interface to HDMI,
the Alchitry Au V2 FPGA is able to expand its own I/O hardware capabilities by adding prototyping spaces, buttons, LEDs, etc.
Before we end this article we will cover the initial setup needed for this series. The first step is to install Vivado in a Windows Computer. Then add these paths to the Windows Environment,
C:\AMDDesignTools\2025.2\Vivado\bin
C:\AMDDesignTools\2025.2\Vivado\doc\eng\man.
We will covering in our next article how to proceed from the Windows PowerShell to complete this demo. The Alchitry Au V2 FPGA is a portable, expandable and powerful board and is available at DigiKey.
Have a great day!
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