A MOSFET Model of a NAND Gate

It is well known that the NAND gate is considered the universal logic gate. Logic gates are usually comprised of a system of transistors and other components all varying in the complexity of design depending on the manufacturer. Regardless of complexity on a manufacturer level, there is a pretty decent, simple model made from four MOSFET transistors that exhibit the same input/output behavior as NAND gates. Here is the circuit diagram:

The top half has two P-Channel MOSFETs in what is known as a “high side” configuration while the bottom half contains two N-Channel MOSFETs in what is known as a “low side” configuration. In layman terms, the expected output of one “high side” configuration should be the opposite of the input (i.e. an on input results in an off output and vice versa) while a “low side” configuration follows the input (i.e. input of on results as an output that is on and vice versa). While this is a good textual description, this sometimes doesn’t always lead to a good understanding of how the circuit functions, I found a better analogy by overlaying “switches” where the MOSFETs are. A “high side” configuration of P-MOS transistors is the same thing as a normally closed switch when no input voltage is present on the gate. A “low side” configuration of N-MOS transistors is the same thing as a normally open switch when no input voltage is present on the gate.
Here is a group of functional diagrams of all possible states:

Both Inputs LOW

A is LOW, B is HIGH

A is HIGH, B is LOW

Both Inputs HIGH

It took me a while to figure out why the N-MOS transistors were needed, in order for the output to be zero or nearly zero, the path needs to be “shorted” to ground. The N-MOS transistors are both on if both inputs are HIGH providing a complete path as they are acting as closed switches when power is applied. The output won’t “exactly” be zero, but low enough to be considered LOW by standard (the transistors have some amount of voltage drop thus making it not exactly zero, but close enough). Notice the output matches the truth table for a NAND gate where ~5V = 1 and ~0V = 0 (y usually means out for truth tables):

A B y
0 0 1
0 1 1
1 0 1
1 1 0

Why cover this topic when there are already logic gates made? It is sometimes important to look at how a gate works before working with the gates alone. The inclusion of transistors always means there is going to be a slight change compared to the supply voltage due to voltage drops, this is a key concept as to tell systems what is considered a “LOW” value and a “HIGH” value. You can also use this setup to model logic gates in simulation software to test circuits before developing on a board. I will eventually show how I modeled all the base logic gates using this NAND gate representation in LTSpice. Yes, the program technically has some of these already made, but having different models than the default can help you understand concepts when you build things from the ground up.
Want to try building this in the real world? We have some parts that you could combine on a breadboard to see if this works:

Brief Description Digi-Key Part Number Manufacturer Part Number
MOSFET N-CH 60V 32A TO220-3 FQP30N06L-ND FQP30N06L
MOSFET P-CH 40V 430MA TO92-3 TP0604N3-G-ND TP0604N3-G
ARDUINO UNO R3 ATMEGA328P EVAL 1050-1024-ND A000066

The 5V pin on the Arduino would have enough to activate both MOSFETs, it’s up to you what you want to power for testing (or just use a multi-meter for reading voltage).

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