DE-25 FPGA Dev Kit Part 1

In this series the DE-25 FPGA Dev Kit,

will be covered that features an Intel Agilex 5 SoC FPGA : A5ED013BB32AE4SCS (130K LEs)

with traditional DSP and AI Tensor Blocks. It has following peripherals as shown in the next block diagram,

This previous block diagram shows the FPGA SoC (Blue Region) and Hard Processor System (HPS) (Yellow Region).

FPGA (Blue Region)

  • Agilex 5 SoC FPGA : A5ED013BB32AE4SCS (130K LEs)
  • ASx4 128 Mbit QSPI Flash
  • USB-Blaster III onboard for programming; JTAG Mode
  • 64MB SDRAM (16-bit data bus)
  • 1GB DDR4 SDRAM (32-bit data bus) share with HPS
  • 4 push-buttons
  • 10 slide switches
  • 10 red user LEDs
  • Six 7-segment displays
  • Four 50 MHz clock sources from the clock generator
  • 24-bit CD-quality audio CODEC with line-in, line-out, and microphone-in jacks
  • HDMI 2.0 Output Port (Support 1080P)
  • Composite color video decoder (NTSC/PAL/SECAM) and composite-video-in connector
  • IR receiver and IR emitter
  • One HSMC connector with 4 transceivers
  • One 40-pin expansion header with diode protection
  • A/D converter, 4-pin SPI interface with FPGA
  • One 2-lane MIPI Connector for Camera/Display

HPS (Hard Processor System) (Yellow Region)

  • ARM Cortex Processor with 2× A55 and 2× A76 cores
  • 1 Gigabit Ethernet PHY with RJ45 connector
  • 2-port USB host with two Type-A USB connectors
  • Micro SD card socket
  • Accelerometer (I2C interface + interrupt)
  • UART to USB, Type-C USB connector
  • Cold reset button
  • One user button and one user LED
  • One 3.3V 1×6 GPIO Header
  • 128×64 pixel LCD module with backlight

The DE25-Standard Resource Package contains all the documents and supporting materials associated with DE25-Standard, including the user manual, system builder, reference designs, and device datasheets. Users can download this Resource Package from the link: http://DE25-standard.terasic.com/cd/ (Download Rev D). Here the classical GUI system builder can be used to generate templates for projects as needed.

First proceed to install Quartus Prime Software from the Intel website.

Included with DE25-Standard Development and Education Kit is a free license for Quartus® Pro Edition software — no additional license purchase is required. Developers can leverage full design and compilation capabilities of Quartus® Pro without incurring licensing fees. Learn more about acquiring your free license.

In the next article a simple demo will be produced. The DE-25 FPGA board is very user friendly like many of the classical boards and is available at DigiKey.

Have a nice day!

This article is available in spanish here.

Este artículo está disponible en español aquí.

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