The purpose of this article in this series (so far Part 1, Part 2, Part 3, Part 4, Part 5, Part 6, Part 7, Part 8, Part 9 and Part 10) is to present a demo related to the Nios-V IP soft processor in the DE-25 FPGA Dev Kit. To clarify any confusion that might arise in this system, it is important to understand that this is an open source RISC-V soft-core processor (A similar Raspberry Pico dual RISC-V processor system can be used to learn about it, see this previous article) that resides inside the Agilex 5 FPGA (blue left region), not in the Hard Processor System (HPS) (yellow right region), as shown in the next diagram.
In this series there has been 4 articles related to the ARM processors in the HPS region in this system, please refer to Part 6, Part 7, Part 8, Part 9 for more details.
This demo will consist of a C++ program that will run inside the Nios-V processor that will change some parameters of a IMX519 camera and generate some test patterns (typically useful for testing purposes) connected to the mobile industry processor interface (MIPI) D-PHY as shown here via the 22-pin MIPI connector,
also shown here in the following picture,
and output that video with some internal video test patterns in a loop sequence via the high performance HDMI transmitter (Analog Devices ADV7513) to a monitor as shown here,
The C++ program for this demo developed by DigiKey for the Nios-V processor is shown below,
void DigiKey_Coffee_Cup_Demo(){
printf("======= DigiKey Coffee Cup Mipi Camera to HDMI Demo =======\r\n");
bool bSuccess;
int Value;
unsigned int blue[5] = {0x100, 0x1F00, 0x3F00, 0x5F00, 0x7FFF};
unsigned int red[5] = {0x100, 0x1F00, 0x3F00, 0x5F00, 0x7FFF};
unsigned int nPatternID;
unsigned int focus;
while(1)
{
focus = 0;
gpVcmI2C->set_pos(focus);
while (focus < 10000)
{
nPatternID = 2;
while (nPatternID < 5)
{
unsigned int blueindex =0;
unsigned int redindex = 0;
while(redindex < 5)
{
while(blueindex < 5)
{
gpCameraI2C->imx519_set_color_balance_BR(blue[blueindex], red[redindex]);
blueindex = blueindex + 1;
usleep(700000);
}
redindex = redindex + 1;
usleep(100000);
}
gpCameraI2C->imx519_set_test_patttern(nPatternID);
nPatternID = nPatternID + 1;
//waitFor(1);
usleep(700000);
gpCameraI2C->imx519_set_test_patttern(0);
}
focus = focus + 100;
}
}
}
This C++ program demo changes the following arbitrarily selected camera parameters and internally generated test patterns in a loop sequence,
gpVcmI2C->set_pos(focus);
gpCameraI2C->imx519_set_test_patttern(nPatternID);
gpCameraI2C->imx519_set_color_balance_BR(blue[blueindex], red[redindex]);
the focus parameter, the color balance and some inherent built-in test patterns. This is implemented in the following system,
Please refer to the DE25-Standard Demonstration Manual for a complete description of this reference design. Essentially, the Nios-V processor interfaces via the I2C interface to the camera and the Avalon interface to the AVMM bridge to the rest of the VVP_system that implements the Demosaic Bayer to RGB module and other modules related to the HDMI image inside the FPGA that perform buffering and some conversions needed to feed the video stream to the Analog Devices ADV7513 HDMI transmitter to the monitor that displays the image.
In order to compile this program for the Nios-V IP please install the RiscFree Integrated Development Environment (IDE) as shown in the next Quartus Prime Installer Add-Ons and Standalone Software
in this case the following version was installed,
The next picture shows the C++ program was successfully built in about 23 seconds for this demo,
This build process will produce an Executable and Linkable Format (.elf) file, in this case called camera.elf, which is the relevant file to be used later, to program the Nios-V IP soft core processor inside the FPGA. Please sure make the path to the Nios-V utilities are present in the environment in this case the Windows Operating System in this case C:\altera_pro\25.3.1\niosv\bin using as an option the System Properties,
Connect the USB cable to the DE-25 FPGA Dev Kit. and open a windows terminal. Setup the FPGA configuration as follows (to volatile memory),
demo\quartus_pgm.exe -m jtag -c 1 -o "p;top.sof"
For non-volatile flash memory configuration use the following flash.cdf file,
JedecChain;
FileRevision(JESD32A);
DefaultMfr(6E);
P ActionCode(Cfg)
Device PartName(A5ED013BB32AE4SCS) Path("./") File("golden_top.jic") MfrSpec(OpMask(1) SEC_Device(MT25QU128) Child_OpMask(1 1));
ChainEnd;
AlteraBegin;
ChainType(JTAG);
Frequency(16000000);
AlteraEnd;
and use the following commands,
demo\quartus_pfg -c top.sof top.jic -o device=MT25QU128 -o flash_loader=A5ED013BB32AE4SCS -o mode=ASX4
demo\quartus_pgm.exe -m jtag -c 1 ./flash.cdf
then upload the camera.elf to the volatile memory of the Nios-V via the nios-v shell as follows,
demo\software\camera_app\build\Default> niosv-shell.exe --run "niosv-download.exe camera.elf -c 1 -r -g"
This completes de camera demo for the DE-25 FPGA Dev Kit.
If the previous steps are performed using the non-volatile flash memory setup method, then it will only be completed once and it will remain intact even if its power cycled. This non-volatile setup method will be covered in a separate article due the extensive length of this article. We can generate a .jic file from the .sof file with ram.hex file. To create a .hex file from the .elf file for this purpose perform the following elf2hex command,
demo\elf2hex.exe software\camera_app\build\Default\camera.elf -o ram.hex -b 0x00000000 -w 32 -e 0x0007ffff
Do following steps inside the Quartus Software to convert the .sof + .hex file to a .jic file, Select File → Convert Programming files from the quartus top menu. Setup the settings in the Convert Programming File window for the project in consideration. (Configuration Device, Mode, Addressing Mode, Bit-level endianness, etc.)
The original camera for this demo Part No: FXX-3138-ADC as of today at the moment of the creation of this article is not currently available. Nevertheless, here at DigiKey we have another option for those custumers who need an alternate camera right now that also works with the DE-25 FPGA Dev Kit.. Here is an alternate camera option that will work with this system DigiKey Part Number 1568-19512-ND that is currently available at DigiKey.
Here at DigiKey we are always available to provide alternate compatible parts when a part is not currently in stock. So please don’t hesitate to contact the DigiKey TechForum Team for any assistance that you might need. Have a nice day!
This article is available in spanish here.
Este artículo está disponible en español aquí.